{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,7,10]],"date-time":"2026-07-10T16:23:55Z","timestamp":1783700635765,"version":"3.55.0"},"reference-count":37,"publisher":"Institute of Electrical and Electronics Engineers (IEEE)","issue":"12","license":[{"start":{"date-parts":[[2017,12,1]],"date-time":"2017-12-01T00:00:00Z","timestamp":1512086400000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"},{"start":{"date-parts":[[2017,12,1]],"date-time":"2017-12-01T00:00:00Z","timestamp":1512086400000},"content-version":"am","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"},{"start":{"date-parts":[[2017,12,1]],"date-time":"2017-12-01T00:00:00Z","timestamp":1512086400000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2017,12,1]],"date-time":"2017-12-01T00:00:00Z","timestamp":1512086400000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"funder":[{"DOI":"10.13039\/100000001","name":"National Science Foundation","doi-asserted-by":"publisher","award":["CNS-1319105"],"award-info":[{"award-number":["CNS-1319105"]}],"id":[{"id":"10.13039\/100000001","id-type":"DOI","asserted-by":"publisher"}]},{"DOI":"10.13039\/100000001","name":"National Science Foundation","doi-asserted-by":"publisher","award":["CNS-1441667"],"award-info":[{"award-number":["CNS-1441667"]}],"id":[{"id":"10.13039\/100000001","id-type":"DOI","asserted-by":"publisher"}]},{"DOI":"10.13039\/100000028","name":"Semiconductor Research Corporation","doi-asserted-by":"publisher","award":["2014-TS-2554"],"award-info":[{"award-number":["2014-TS-2554"]}],"id":[{"id":"10.13039\/100000028","id-type":"DOI","asserted-by":"publisher"}]},{"DOI":"10.13039\/100000183","name":"Army Research Office","doi-asserted-by":"publisher","award":["W911NF-17-1-0477"],"award-info":[{"award-number":["W911NF-17-1-0477"]}],"id":[{"id":"10.13039\/100000183","id-type":"DOI","asserted-by":"publisher"}]},{"name":"Cisco"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["IEEE Trans. VLSI Syst."],"published-print":{"date-parts":[[2017,12]]},"DOI":"10.1109\/tvlsi.2017.2751615","type":"journal-article","created":{"date-parts":[[2017,10,2]],"date-time":"2017-10-02T18:45:22Z","timestamp":1506969922000},"page":"3390-3400","source":"Crossref","is-referenced-by-count":21,"title":["Automatic Code Converter Enhanced PCH Framework for SoC Trust Verification"],"prefix":"10.1109","volume":"25","author":[{"given":"Xiaolong","family":"Guo","sequence":"first","affiliation":[],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Raj Gautam","family":"Dutta","sequence":"additional","affiliation":[],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Prabhat","family":"Mishra","sequence":"additional","affiliation":[],"role":[{"vocabulary":"crossref","role":"author"}]},{"ORCID":"https:\/\/orcid.org\/0000-0002-8791-0597","authenticated-orcid":false,"given":"Yier","family":"Jin","sequence":"additional","affiliation":[],"role":[{"vocabulary":"crossref","role":"author"}]}],"member":"263","reference":[{"key":"ref33","year":"2017","journal-title":"OpenCores Projects"},{"key":"ref32","first-page":"48","article-title":"Hierarchy-preserving formal verifiation methods for pre-silicon security assurance","author":"guo","year":"2015","journal-title":"Proc 16th Int Workshop Microprocess SOC Test Verification (MTV)"},{"key":"ref31","first-page":"51","article-title":"Verifying parametrised hardware designs via counter automata","author":"smr?ka","year":"2007","journal-title":"Proc Haifa Verification Conf"},{"key":"ref30","doi-asserted-by":"publisher","DOI":"10.1016\/S0065-2458(03)58003-2"},{"key":"ref37","year":"2017","journal-title":"Leon 3 synthesizable processor"},{"key":"ref36","year":"2017","journal-title":"RS232\/UART Interface"},{"key":"ref35","year":"2017","journal-title":"Basic des Crypto Core"},{"key":"ref34","year":"2017","journal-title":"AES Core Modules"},{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1109\/FPL.2010.59"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1145\/2744769.2744823"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1007\/3-540-44829-2_17"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1109\/SP.1984.10019"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1109\/HST.2016.7495569"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1109\/MTV.2016.23"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.1109\/ICCAD.2013.6691208"},{"key":"ref17","doi-asserted-by":"publisher","DOI":"10.1145\/263699.263712"},{"key":"ref18","year":"2010","journal-title":"The Coq Proof Assistant"},{"key":"ref19","first-page":"135","article-title":"Incremental formal verification of hardware","author":"chockler","year":"2011","journal-title":"Proc Int Conf Formal Methods Comput -Aided Design (FMCAD)"},{"key":"ref28","author":"clarke","year":"1999","journal-title":"Model checking"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/HST.2011.5954998"},{"key":"ref27","author":"eisner","year":"2006","journal-title":"Model Checking Software"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1145\/2508859.2516654"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/HST.2013.6581573"},{"key":"ref29","first-page":"154","article-title":"Counterexample-guided abstraction refinement","author":"clarke","year":"2000","journal-title":"Model Checking Software"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/TIFS.2011.2160627"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1109\/FMCAD.2008.ECP.9"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/ISVLSI.2014.54"},{"key":"ref2","first-page":"51","article-title":"Hardware Trojan detection using path delay fingerprint","author":"jin","year":"2008","journal-title":"Proc IEEE Int Workshop Hardw -Orient Secur Trust"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/HST.2010.5513114"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1145\/2744769.2747939"},{"key":"ref20","doi-asserted-by":"crossref","first-page":"70","DOI":"10.1007\/978-3-642-18275-4_7","article-title":"Sat-based model checking without unrolling","author":"bradley","year":"2011","journal-title":"Proc Int Conf Verification Model Checking Abstract Interpretation"},{"key":"ref22","doi-asserted-by":"publisher","DOI":"10.1109\/SC.2010.7"},{"key":"ref21","doi-asserted-by":"publisher","DOI":"10.1145\/1837274.1837466"},{"key":"ref24","article-title":"Model checking and theorem proving: A unified framework","author":"berezin","year":"2002"},{"key":"ref23","first-page":"1","article-title":"Formally verifying IEEE compliance of floating-point hardware","volume":"3","author":"o\u2019leary","year":"1999","journal-title":"Intel Technol J"},{"key":"ref26","doi-asserted-by":"publisher","DOI":"10.1109\/ISCAS.2015.7168562"},{"key":"ref25","doi-asserted-by":"publisher","DOI":"10.1016\/j.infsof.2004.07.002"}],"container-title":["IEEE Transactions on Very Large Scale Integration (VLSI) Systems"],"original-title":[],"link":[{"URL":"http:\/\/ieeexplore.ieee.org\/ielaam\/92\/8118264\/8054741-aam.pdf","content-type":"application\/pdf","content-version":"am","intended-application":"syndication"},{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/92\/8118264\/08054741.pdf?arnumber=8054741","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2022,4,8]],"date-time":"2022-04-08T18:48:33Z","timestamp":1649443713000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/8054741\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2017,12]]},"references-count":37,"journal-issue":{"issue":"12"},"URL":"https:\/\/doi.org\/10.1109\/tvlsi.2017.2751615","relation":{},"ISSN":["1063-8210","1557-9999"],"issn-type":[{"value":"1063-8210","type":"print"},{"value":"1557-9999","type":"electronic"}],"subject":[],"published":{"date-parts":[[2017,12]]}}}