{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,1,24]],"date-time":"2026-01-24T15:26:31Z","timestamp":1769268391374,"version":"3.49.0"},"reference-count":25,"publisher":"Institute of Electrical and Electronics Engineers (IEEE)","issue":"1","license":[{"start":{"date-parts":[[2018,1,1]],"date-time":"2018-01-01T00:00:00Z","timestamp":1514764800000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["IEEE Trans. VLSI Syst."],"published-print":{"date-parts":[[2018,1]]},"DOI":"10.1109\/tvlsi.2017.2757511","type":"journal-article","created":{"date-parts":[[2017,10,13]],"date-time":"2017-10-13T18:38:58Z","timestamp":1507919938000},"page":"37-49","source":"Crossref","is-referenced-by-count":16,"title":["Delay Monitoring System With Multiple Generic Monitors for Wide Voltage Range Operation"],"prefix":"10.1109","volume":"26","author":[{"ORCID":"https:\/\/orcid.org\/0000-0002-7366-7792","authenticated-orcid":false,"given":"Jongho","family":"Kim","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"ORCID":"https:\/\/orcid.org\/0000-0001-6138-6697","authenticated-orcid":false,"given":"Kiyoung","family":"Choi","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Yonghwan","family":"Kim","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Wook","family":"Kim","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Kyungtae","family":"Do","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Jungyun","family":"Choi","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.3850\/9783981537079_0330"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1109\/TSM.2005.863244"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1109\/CICC.2010.5617624"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2008.2010399"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1109\/ICCAD.2010.5654280"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1109\/ISQED.2012.6187559"},{"key":"ref16","article-title":"Semiconductor device replica circuit for monitoring critical path and construction method of the same","author":"seno","year":"2002"},{"key":"ref17","first-page":"188","article-title":"In situ delay-slack monitor for high-performance processors using an all-digital self-calibrating 5 ps resolution time-to-digital converter","author":"fick","year":"2010","journal-title":"IEEE Int Solid-State Circuits Conf (ISSCC) Dig Tech Papers"},{"key":"ref18","doi-asserted-by":"publisher","DOI":"10.1109\/ICCAD.2008.4681644"},{"key":"ref19","first-page":"398","article-title":"A distributed critical-path timing monitor for a 65 nm high-performance microprocessor","author":"drake","year":"2007","journal-title":"IEEE Int Solid-State Circuits Conf (ISSCC) Dig Tech Papers"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/TDMR.2012.2189402"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/TED.2011.2121913"},{"key":"ref6","first-page":"723","article-title":"Variability analysis of a 28 nm near-threshold synchronous voltage converter","author":"tekeste","year":"2013","journal-title":"Proc IEEE Int Conf Electron Circuits Syst"},{"key":"ref5","first-page":"66","article-title":"A 280 mV-to-1.2 V wide-operating-range IA-32 processor in 32 nm CMOS","author":"jain","year":"2012","journal-title":"IEEE Int Solid-State Circuits Conf (ISSCC) Dig Tech Papers"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1145\/2228360.2228536"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/MM.2013.71"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/IEDM.2007.4418976"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1109\/JETCAS.2011.2135550"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/IEDM.2013.6724645"},{"key":"ref20","doi-asserted-by":"publisher","DOI":"10.1109\/ICICDT.2008.4567288"},{"key":"ref22","first-page":"112","article-title":"Tunable replica circuits and adaptive voltage-frequency techniques for dynamic voltage, temperature, and aging variation tolerance","author":"tschanz","year":"2009","journal-title":"Proc IEEE Symp VLSI Circuits"},{"key":"ref21","article-title":"Accurate model-to-hardware simulation methodology for designing critical path monitors over a wide voltage range","author":"drake","year":"2013","journal-title":"Proc ACM\/EDAC\/IEEE Design Autom Conf"},{"key":"ref24","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2011.2158124"},{"key":"ref23","doi-asserted-by":"publisher","DOI":"10.1109\/TCSI.2011.2163893"},{"key":"ref25","doi-asserted-by":"publisher","DOI":"10.1145\/2429384.2429543"}],"container-title":["IEEE Transactions on Very Large Scale Integration (VLSI) Systems"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/92\/8240812\/08067533.pdf?arnumber=8067533","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2022,1,12]],"date-time":"2022-01-12T16:24:44Z","timestamp":1642004684000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/8067533\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2018,1]]},"references-count":25,"journal-issue":{"issue":"1"},"URL":"https:\/\/doi.org\/10.1109\/tvlsi.2017.2757511","relation":{},"ISSN":["1063-8210","1557-9999"],"issn-type":[{"value":"1063-8210","type":"print"},{"value":"1557-9999","type":"electronic"}],"subject":[],"published":{"date-parts":[[2018,1]]}}}