{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,9,26]],"date-time":"2025-09-26T13:41:24Z","timestamp":1758894084772,"version":"3.37.3"},"reference-count":42,"publisher":"Institute of Electrical and Electronics Engineers (IEEE)","issue":"2","license":[{"start":{"date-parts":[[2018,2,1]],"date-time":"2018-02-01T00:00:00Z","timestamp":1517443200000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"},{"start":{"date-parts":[[2018,2,1]],"date-time":"2018-02-01T00:00:00Z","timestamp":1517443200000},"content-version":"am","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"},{"start":{"date-parts":[[2018,2,1]],"date-time":"2018-02-01T00:00:00Z","timestamp":1517443200000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2018,2,1]],"date-time":"2018-02-01T00:00:00Z","timestamp":1517443200000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"funder":[{"DOI":"10.13039\/100000001","name":"National Science Foundation","doi-asserted-by":"publisher","award":["CNS 1526913"],"award-info":[{"award-number":["CNS 1526913"]}],"id":[{"id":"10.13039\/100000001","id-type":"DOI","asserted-by":"publisher"}]}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["IEEE Trans. VLSI Syst."],"published-print":{"date-parts":[[2018,2]]},"DOI":"10.1109\/tvlsi.2017.2759219","type":"journal-article","created":{"date-parts":[[2017,11,16]],"date-time":"2017-11-16T19:11:15Z","timestamp":1510859475000},"page":"249-261","source":"Crossref","is-referenced-by-count":4,"title":["ElasticCore: A Dynamic Heterogeneous Platform With Joint Core and Voltage\/Frequency Scaling"],"prefix":"10.1109","volume":"26","author":[{"ORCID":"https:\/\/orcid.org\/0000-0002-2038-4908","authenticated-orcid":false,"given":"Mohammad","family":"Khavari Tavana","sequence":"first","affiliation":[]},{"given":"Mohammad Hossein","family":"Hajkazemi","sequence":"additional","affiliation":[]},{"ORCID":"https:\/\/orcid.org\/0000-0001-8887-6645","authenticated-orcid":false,"given":"Divya","family":"Pathak","sequence":"additional","affiliation":[]},{"ORCID":"https:\/\/orcid.org\/0000-0003-4230-1795","authenticated-orcid":false,"given":"Ioannis","family":"Savidis","sequence":"additional","affiliation":[]},{"given":"Houman","family":"Homayoun","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"key":"ref39","doi-asserted-by":"publisher","DOI":"10.1109\/TPEL.2012.2230408"},{"key":"ref38","first-page":"432","article-title":"FIVR&#x2014;Fully integrated voltage regulators on 4th generation Intel Core SoCs","author":"burton","year":"2014","journal-title":"Proc IEEE Appl Power Electron Conf Expo (APEC)"},{"key":"ref33","doi-asserted-by":"publisher","DOI":"10.1145\/1168917.1168881"},{"key":"ref32","doi-asserted-by":"publisher","DOI":"10.1145\/1816038.1815967"},{"key":"ref31","doi-asserted-by":"publisher","DOI":"10.1145\/383082.383088"},{"key":"ref30","doi-asserted-by":"publisher","DOI":"10.1145\/859618.859636"},{"key":"ref37","doi-asserted-by":"publisher","DOI":"10.1109\/MM.2014.10"},{"journal-title":"Econometric Analysis","year":"2003","author":"greene","key":"ref36"},{"key":"ref35","doi-asserted-by":"publisher","DOI":"10.1017\/CBO9780511754098"},{"key":"ref34","doi-asserted-by":"crossref","DOI":"10.4324\/9780203774441","author":"cohen","year":"2013","journal-title":"Applied Multiple Regression\/Correlation Analysis for the Behavioral Sciences"},{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1109\/VLSID.2016.93"},{"key":"ref40","doi-asserted-by":"publisher","DOI":"10.1145\/1669112.1669172"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1145\/2628071.2628078"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1145\/2856125"},{"journal-title":"OMAP Applications Processor","year":"2015","key":"ref13"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1145\/2333660.2333737"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1109\/MICRO.2007.41"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.1109\/MICRO.2012.37"},{"journal-title":"Qualcomm Unveils 64-Bit Snapdragon 808 and 810 SoCs The Apple A7 Stop-Gap Measures Continue","year":"2014","author":"whitwam","key":"ref17"},{"journal-title":"Nvidias tegra x1 crushes the competition","year":"2015","author":"gil","key":"ref18"},{"journal-title":"SAMSUNG Highlights Innovations in Mobile Experiences Driven by Components in CES Keynote","year":"2013","key":"ref19"},{"key":"ref28","doi-asserted-by":"publisher","DOI":"10.1109\/TC.2006.23"},{"journal-title":"Big LITTLE Processing with ARM CortexTM-A15 & Cortex-A7","year":"2011","author":"greenhalghl","key":"ref4"},{"key":"ref27","doi-asserted-by":"publisher","DOI":"10.1109\/HPCA.2011.5749712"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/MICRO.2003.1253185"},{"key":"ref6","first-page":"123","article-title":"System level analysis of fast, per-core DVFS using on-chip switching regulators","author":"kim","year":"2008","journal-title":"Proc IEEE 14th Int Symp High Perform Comput Archit"},{"key":"ref29","doi-asserted-by":"publisher","DOI":"10.1109\/MC.2003.1250883"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/ICCD.2015.7357120"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1109\/CASES.2013.6662519"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1145\/2523781\/2560035"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/MM.2012.2"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1145\/2744769.2744833"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1145\/2024723.2000108"},{"key":"ref20","doi-asserted-by":"publisher","DOI":"10.1109\/ICCD.2013.6657025"},{"key":"ref22","doi-asserted-by":"publisher","DOI":"10.1145\/2366231.2337184"},{"key":"ref21","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2015.2421911"},{"key":"ref42","first-page":"819","article-title":"Simulation and modeling of a simultaneous multithreading processor","author":"tullsen","year":"1996","journal-title":"Proc 22nd Int Conf Resource Manage Perform Eval Enterprise Comput Syst"},{"key":"ref24","first-page":"1","article-title":"Enabling dynamic heterogeneity through core-on-core stacking","author":"kontorinis","year":"2014","journal-title":"Proc 51st Annu Design Autom Conf"},{"journal-title":"Voltage Mode Synchronous Buck Controller With Temperature-Compensated DCR Current Sensing","year":"2014","key":"ref41"},{"key":"ref23","doi-asserted-by":"publisher","DOI":"10.1109\/ICCD.2015.7357168"},{"key":"ref26","doi-asserted-by":"publisher","DOI":"10.1109\/MICRO.2012.36"},{"key":"ref25","doi-asserted-by":"publisher","DOI":"10.1145\/1273440.1250686"}],"container-title":["IEEE Transactions on Very Large Scale Integration (VLSI) Systems"],"original-title":[],"link":[{"URL":"http:\/\/ieeexplore.ieee.org\/ielaam\/92\/8263418\/8113546-aam.pdf","content-type":"application\/pdf","content-version":"am","intended-application":"syndication"},{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/92\/8263418\/08113546.pdf?arnumber=8113546","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2022,4,8]],"date-time":"2022-04-08T18:48:35Z","timestamp":1649443715000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/8113546\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2018,2]]},"references-count":42,"journal-issue":{"issue":"2"},"URL":"https:\/\/doi.org\/10.1109\/tvlsi.2017.2759219","relation":{},"ISSN":["1063-8210","1557-9999"],"issn-type":[{"type":"print","value":"1063-8210"},{"type":"electronic","value":"1557-9999"}],"subject":[],"published":{"date-parts":[[2018,2]]}}}