{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,7,1]],"date-time":"2026-07-01T20:18:00Z","timestamp":1782937080683,"version":"3.54.5"},"reference-count":24,"publisher":"Institute of Electrical and Electronics Engineers (IEEE)","issue":"2","license":[{"start":{"date-parts":[[2018,2,1]],"date-time":"2018-02-01T00:00:00Z","timestamp":1517443200000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"}],"funder":[{"DOI":"10.13039\/501100004826","name":"Beijing Natural Science Foundation","doi-asserted-by":"publisher","award":["4162014"],"award-info":[{"award-number":["4162014"]}],"id":[{"id":"10.13039\/501100004826","id-type":"DOI","asserted-by":"publisher"}]},{"DOI":"10.13039\/501100001809","name":"National Natural Science Foundation of China","doi-asserted-by":"publisher","award":["61106028"],"award-info":[{"award-number":["61106028"]}],"id":[{"id":"10.13039\/501100001809","id-type":"DOI","asserted-by":"publisher"}]}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["IEEE Trans. VLSI Syst."],"published-print":{"date-parts":[[2018,2]]},"DOI":"10.1109\/tvlsi.2017.2765677","type":"journal-article","created":{"date-parts":[[2017,11,7]],"date-time":"2017-11-07T19:10:45Z","timestamp":1510081845000},"page":"319-328","source":"Crossref","is-referenced-by-count":33,"title":["The Implementation of the Improved OMP for AIC Reconstruction Based on Parallel Index Selection"],"prefix":"10.1109","volume":"26","author":[{"ORCID":"https:\/\/orcid.org\/0000-0002-8904-1305","authenticated-orcid":false,"given":"Sujuan","family":"Liu","sequence":"first","affiliation":[],"role":[{"vocabulary":"crossref","role":"author"}]},{"ORCID":"https:\/\/orcid.org\/0000-0002-9234-2985","authenticated-orcid":false,"given":"Ning","family":"Lyu","sequence":"additional","affiliation":[],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Haojiang","family":"Wang","sequence":"additional","affiliation":[],"role":[{"vocabulary":"crossref","role":"author"}]}],"member":"263","reference":[{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2013.2284673"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1117\/12.849536"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2016.2554401"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1109\/TSP.2014.2301980"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1109\/TSP.2016.2620105"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1109\/ISCAS.2010.5537976"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.1109\/ISCAS.2012.6271921"},{"key":"ref17","doi-asserted-by":"publisher","DOI":"10.1109\/ICCNC.2013.6504167"},{"key":"ref18","doi-asserted-by":"publisher","DOI":"10.1109\/ISSPA.2012.6310501"},{"key":"ref19","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2014.2358716"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/MIM.2017.7864545"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/TIT.2006.871582"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/EDCAV.2015.7060548"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/ISCAS.2007.378360"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1109\/TIT.2009.2034811"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/DCAS.2006.321036"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/TIT.2005.862083"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/JETCAS.2012.2220253"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.21014\/acta_imeko.v4i1.175"},{"key":"ref20","doi-asserted-by":"publisher","DOI":"10.1109\/DASIP.2014.7115609"},{"key":"ref22","article-title":"High performance reconfigurable computing for Cholesky decomposition","author":"yang","year":"2009","journal-title":"Proc Symp Appl Accel High-Perform Comput"},{"key":"ref21","doi-asserted-by":"publisher","DOI":"10.1007\/978-3-540-68111-3_15"},{"key":"ref24","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2009.2036926"},{"key":"ref23","doi-asserted-by":"publisher","DOI":"10.1109\/JETCAS.2013.2284618"}],"container-title":["IEEE Transactions on Very Large Scale Integration (VLSI) Systems"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/92\/8263418\/08100638.pdf?arnumber=8100638","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2022,1,12]],"date-time":"2022-01-12T16:27:24Z","timestamp":1642004844000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/8100638\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2018,2]]},"references-count":24,"journal-issue":{"issue":"2"},"URL":"https:\/\/doi.org\/10.1109\/tvlsi.2017.2765677","relation":{},"ISSN":["1063-8210","1557-9999"],"issn-type":[{"value":"1063-8210","type":"print"},{"value":"1557-9999","type":"electronic"}],"subject":[],"published":{"date-parts":[[2018,2]]}}}