{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,1,7]],"date-time":"2026-01-07T23:05:47Z","timestamp":1767827147131,"version":"3.49.0"},"reference-count":25,"publisher":"Institute of Electrical and Electronics Engineers (IEEE)","issue":"2","license":[{"start":{"date-parts":[[2018,2,1]],"date-time":"2018-02-01T00:00:00Z","timestamp":1517443200000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["IEEE Trans. VLSI Syst."],"published-print":{"date-parts":[[2018,2]]},"DOI":"10.1109\/tvlsi.2017.2766362","type":"journal-article","created":{"date-parts":[[2017,11,7]],"date-time":"2017-11-07T19:10:45Z","timestamp":1510081845000},"page":"230-238","source":"Crossref","is-referenced-by-count":5,"title":["On Coding for Endurance Enhancement and Error Control of Phase Change Memories With Write Latency Reduction"],"prefix":"10.1109","volume":"26","author":[{"ORCID":"https:\/\/orcid.org\/0000-0002-8316-7281","authenticated-orcid":false,"given":"Kazuteru","family":"Namba","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"ORCID":"https:\/\/orcid.org\/0000-0003-3152-3245","authenticated-orcid":false,"given":"Fabrizio","family":"Lombardi","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1145\/1669112.1669157"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1109\/HPCA.2015.7056043"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1145\/3017445"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1016\/S0019-9958(82)90344-8"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1109\/TMSCS.2016.2605098"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1145\/1669112.1669117"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.1109\/TC.2015.2506555"},{"key":"ref17","doi-asserted-by":"publisher","DOI":"10.1109\/IEDM.2013.6724726"},{"key":"ref18","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2015.2395415"},{"key":"ref19","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2015.2511147"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2006.888349"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/ICECS.2010.5724687"},{"key":"ref6","first-page":"333","article-title":"Improving privacy and lifetime of PCM-based main memory","author":"kong","year":"2010","journal-title":"Proc IEEE\/IFIP Int Conf Dependable Syst Netw"},{"key":"ref5","first-page":"19","article-title":"A 20 nm 1.8 V 8 Gb PRAM with 40 MB\/s program bandwidth","author":"choi","year":"2012","journal-title":"IEEE Int Solid-State Circuits Conf (ISSCC) Dig Tech Papers"},{"key":"ref8","first-page":"1","article-title":"Write-once-memory-code phase change memory","author":"li","year":"2014","journal-title":"Proc Design Autom Test Eur Conf Exhib"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1145\/2094091.2094104"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/IEDM.2005.1609379"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1109\/ISCAS.2007.377981"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1002\/adma.200900375"},{"key":"ref20","doi-asserted-by":"publisher","DOI":"10.1109\/ICPADS.2016.0116"},{"key":"ref22","doi-asserted-by":"publisher","DOI":"10.1002\/0471792748"},{"key":"ref21","doi-asserted-by":"publisher","DOI":"10.1109\/MWSCAS.2016.7870093"},{"key":"ref24","doi-asserted-by":"publisher","DOI":"10.1016\/S0019-9958(82)90344-8"},{"key":"ref23","doi-asserted-by":"publisher","DOI":"10.1109\/JPROC.2017.2694613"},{"key":"ref25","doi-asserted-by":"publisher","DOI":"10.1109\/WWC.2001.990739"}],"container-title":["IEEE Transactions on Very Large Scale Integration (VLSI) Systems"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/92\/8263418\/08100637.pdf?arnumber=8100637","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2022,1,12]],"date-time":"2022-01-12T16:27:23Z","timestamp":1642004843000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/8100637\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2018,2]]},"references-count":25,"journal-issue":{"issue":"2"},"URL":"https:\/\/doi.org\/10.1109\/tvlsi.2017.2766362","relation":{},"ISSN":["1063-8210","1557-9999"],"issn-type":[{"value":"1063-8210","type":"print"},{"value":"1557-9999","type":"electronic"}],"subject":[],"published":{"date-parts":[[2018,2]]}}}