{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,3,3]],"date-time":"2026-03-03T16:32:40Z","timestamp":1772555560989,"version":"3.50.1"},"reference-count":6,"publisher":"Institute of Electrical and Electronics Engineers (IEEE)","issue":"3","license":[{"start":{"date-parts":[[2018,3,1]],"date-time":"2018-03-01T00:00:00Z","timestamp":1519862400000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["IEEE Trans. VLSI Syst."],"published-print":{"date-parts":[[2018,3]]},"DOI":"10.1109\/tvlsi.2017.2769709","type":"journal-article","created":{"date-parts":[[2017,12,6]],"date-time":"2017-12-06T19:17:49Z","timestamp":1512587869000},"page":"589-593","source":"Crossref","is-referenced-by-count":22,"title":["Low Phase Noise Ku-Band VCO With Optimal Switched-Capacitor Bank Design"],"prefix":"10.1109","volume":"26","author":[{"given":"Peeyoosh","family":"Mirajkar","sequence":"first","affiliation":[]},{"given":"Jagdish","family":"Chand","sequence":"additional","affiliation":[]},{"ORCID":"https:\/\/orcid.org\/0000-0002-8513-0052","authenticated-orcid":false,"given":"Sankaran","family":"Aniruddhan","sequence":"additional","affiliation":[]},{"given":"Srinivas","family":"Theertham","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/TCSII.2012.2190855"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2006.872737"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/BCTM.2012.6352655"},{"key":"ref5","first-page":"313","article-title":"Low phase noise Ku-band Gm-boosting differential Colpitts VCO","author":"chiou","year":"2009","journal-title":"Proc Asia Pacific Microw Conf (APMC)"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/4.972142"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/TCSII.2002.801415"}],"container-title":["IEEE Transactions on Very Large Scale Integration (VLSI) Systems"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/92\/8300457\/08166816.pdf?arnumber=8166816","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2022,1,12]],"date-time":"2022-01-12T16:21:54Z","timestamp":1642004514000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/8166816\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2018,3]]},"references-count":6,"journal-issue":{"issue":"3"},"URL":"https:\/\/doi.org\/10.1109\/tvlsi.2017.2769709","relation":{},"ISSN":["1063-8210","1557-9999"],"issn-type":[{"value":"1063-8210","type":"print"},{"value":"1557-9999","type":"electronic"}],"subject":[],"published":{"date-parts":[[2018,3]]}}}