{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,12,18]],"date-time":"2025-12-18T14:06:29Z","timestamp":1766066789593,"version":"3.37.3"},"reference-count":19,"publisher":"Institute of Electrical and Electronics Engineers (IEEE)","issue":"3","license":[{"start":{"date-parts":[[2018,3,1]],"date-time":"2018-03-01T00:00:00Z","timestamp":1519862400000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"}],"funder":[{"DOI":"10.13039\/501100001809","name":"National Natural Science Foundation of China","doi-asserted-by":"publisher","award":["61674002","61571012","61474001"],"award-info":[{"award-number":["61674002","61571012","61474001"]}],"id":[{"id":"10.13039\/501100001809","id-type":"DOI","asserted-by":"publisher"}]}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["IEEE Trans. VLSI Syst."],"published-print":{"date-parts":[[2018,3]]},"DOI":"10.1109\/tvlsi.2017.2772861","type":"journal-article","created":{"date-parts":[[2017,11,30]],"date-time":"2017-11-30T19:39:08Z","timestamp":1512070748000},"page":"584-588","source":"Crossref","is-referenced-by-count":26,"title":["Average 7T1R Nonvolatile SRAM With R\/W Margin Enhanced for Low-Power Application"],"prefix":"10.1109","volume":"26","author":[{"ORCID":"https:\/\/orcid.org\/0000-0003-2408-5048","authenticated-orcid":false,"given":"Chunyu","family":"Peng","sequence":"first","affiliation":[]},{"ORCID":"https:\/\/orcid.org\/0000-0003-3249-2401","authenticated-orcid":false,"given":"Songsong","family":"Xiao","sequence":"additional","affiliation":[]},{"given":"Wenjuan","family":"Lu","sequence":"additional","affiliation":[]},{"given":"Jingbo","family":"Zhang","sequence":"additional","affiliation":[]},{"given":"Xiulong","family":"Wu","sequence":"additional","affiliation":[]},{"given":"Junning","family":"Chen","sequence":"additional","affiliation":[]},{"ORCID":"https:\/\/orcid.org\/0000-0002-3314-1606","authenticated-orcid":false,"given":"Zhiting","family":"Lin","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2004.827793"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1109\/SISPAD.2014.6931558"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1109\/LED.2013.2293354"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1109\/SOC.2003.1241474"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1016\/j.vlsi.2016.09.008"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2014.2304704"},{"key":"ref16","first-page":"129","article-title":"Analyzing static and dynamic write margin for nanometer SRAMs","author":"jiajing","year":"2008","journal-title":"Proc ACM\/IEEE Int Symp Low Power Electron Design (ISLPED)"},{"key":"ref17","doi-asserted-by":"publisher","DOI":"10.1109\/ICCAD.2008.4681601"},{"key":"ref18","doi-asserted-by":"publisher","DOI":"10.1109\/TCSII.2012.2231014"},{"key":"ref19","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2016.2634701"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/ASPDAC.2012.6164968"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2012.2192661"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/ASSCC.2013.6691028"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/FTFC.2014.6828611"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1109\/TNANO.2014.2329915"},{"key":"ref7","first-page":"239","article-title":"8T1R: A novel low-power high-speed RRAM-based non-volatile SRAM design","author":"tosson","year":"2016","journal-title":"Proc Great Lakes Symp VLSI (GLSVLSI)"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/MDAT.2017.2682252"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/TCSI.2016.2621344"},{"key":"ref9","first-page":"76c","article-title":"RRAM-based 7T1R nonvolatile SRAM with \n$2\\times$\n reduction in store energy and \n$94\\times$\n reduction in restore energy for frequent-off instant-on applications","author":"lee","year":"2015","journal-title":"Proc IEEE Symp VLSI Circuits"}],"container-title":["IEEE Transactions on Very Large Scale Integration (VLSI) Systems"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/92\/8300457\/08125593.pdf?arnumber=8125593","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2022,1,12]],"date-time":"2022-01-12T16:21:54Z","timestamp":1642004514000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/8125593\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2018,3]]},"references-count":19,"journal-issue":{"issue":"3"},"URL":"https:\/\/doi.org\/10.1109\/tvlsi.2017.2772861","relation":{},"ISSN":["1063-8210","1557-9999"],"issn-type":[{"type":"print","value":"1063-8210"},{"type":"electronic","value":"1557-9999"}],"subject":[],"published":{"date-parts":[[2018,3]]}}}