{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,12,26]],"date-time":"2025-12-26T07:10:58Z","timestamp":1766733058433,"version":"3.37.3"},"reference-count":33,"publisher":"Institute of Electrical and Electronics Engineers (IEEE)","issue":"12","license":[{"start":{"date-parts":[[2018,12,1]],"date-time":"2018-12-01T00:00:00Z","timestamp":1543622400000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["IEEE Trans. VLSI Syst."],"published-print":{"date-parts":[[2018,12]]},"DOI":"10.1109\/tvlsi.2018.2799951","type":"journal-article","created":{"date-parts":[[2018,2,14]],"date-time":"2018-02-14T19:18:02Z","timestamp":1518635882000},"page":"2608-2618","source":"Crossref","is-referenced-by-count":19,"title":["A 2M1M Crossbar Architecture: Memory"],"prefix":"10.1109","volume":"26","author":[{"given":"Mehri","family":"Teimoori","sequence":"first","affiliation":[]},{"ORCID":"https:\/\/orcid.org\/0000-0001-5760-6861","authenticated-orcid":false,"given":"Amirali","family":"Amirsoleimani","sequence":"additional","affiliation":[]},{"ORCID":"https:\/\/orcid.org\/0000-0001-5094-5967","authenticated-orcid":false,"given":"Arash","family":"Ahmadi","sequence":"additional","affiliation":[]},{"ORCID":"https:\/\/orcid.org\/0000-0001-5781-6754","authenticated-orcid":false,"given":"Majid","family":"Ahmadi","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"doi-asserted-by":"publisher","key":"ref33","DOI":"10.1109\/TVLSI.2013.2250319"},{"doi-asserted-by":"publisher","key":"ref32","DOI":"10.1109\/JSSC.2012.2237571"},{"key":"ref31","first-page":"6","article-title":"3D-stackable crossbar resistive memory based on field assisted superlinear threshold (FAST) selector","author":"jo","year":"2014","journal-title":"IEDM Tech Dig"},{"doi-asserted-by":"publisher","key":"ref30","DOI":"10.1109\/TED.2015.2461656"},{"doi-asserted-by":"publisher","key":"ref10","DOI":"10.1007\/s00339-011-6264-9"},{"doi-asserted-by":"publisher","key":"ref11","DOI":"10.1021\/nl203206h"},{"doi-asserted-by":"publisher","key":"ref12","DOI":"10.1109\/TVLSI.2013.2277715"},{"doi-asserted-by":"publisher","key":"ref13","DOI":"10.1109\/TCSI.2015.2407436"},{"doi-asserted-by":"publisher","key":"ref14","DOI":"10.1088\/0957-4484\/20\/42\/425204"},{"year":"2015","author":"gao","journal-title":"Future large-scale memristive device crossbar arrays Limits imposed by sneak-path currents on read operations","key":"ref15"},{"doi-asserted-by":"publisher","key":"ref16","DOI":"10.1016\/j.mejo.2012.10.001"},{"doi-asserted-by":"publisher","key":"ref17","DOI":"10.1109\/TVLSI.2011.2136443"},{"doi-asserted-by":"publisher","key":"ref18","DOI":"10.1109\/LED.2012.2209394"},{"key":"ref19","first-page":"1420","article-title":"Simulation of taox-based complementary resistive switches by a physics-based memristive model","author":"siemon","year":"2014","journal-title":"Proc IEEE Int Symp Circuits Syst (ISCAS)"},{"doi-asserted-by":"publisher","key":"ref28","DOI":"10.1063\/1.3544205"},{"doi-asserted-by":"publisher","key":"ref4","DOI":"10.1088\/0957-4484\/22\/48\/485203"},{"doi-asserted-by":"publisher","key":"ref27","DOI":"10.1109\/IEDM.2011.6131653"},{"doi-asserted-by":"publisher","key":"ref3","DOI":"10.1073\/pnas.0806642106"},{"doi-asserted-by":"publisher","key":"ref6","DOI":"10.1109\/TCSII.2017.2729499"},{"key":"ref29","first-page":"1","article-title":"Selector design considerations and requirements for 1 SIR RRAM crossbar array","author":"zhang","year":"2014","journal-title":"Proc IEEE Int Memory Workshop (IMW)"},{"doi-asserted-by":"publisher","key":"ref5","DOI":"10.1109\/ICECS.2014.7050047"},{"doi-asserted-by":"publisher","key":"ref8","DOI":"10.1109\/TDMR.2005.860818"},{"doi-asserted-by":"publisher","key":"ref7","DOI":"10.1142\/S021812741430016X"},{"key":"ref2","doi-asserted-by":"crossref","first-page":"80","DOI":"10.1038\/nature06932","article-title":"The missing memristor found","volume":"453","author":"strukov","year":"2008","journal-title":"Nature"},{"key":"ref9","first-page":"731","article-title":"An overview of non-volatile memory technology and the implication for tools and architectures","author":"li","year":"2009","journal-title":"Proc Design Autom Test Eur Conf Exhibition (DATE)"},{"doi-asserted-by":"publisher","key":"ref1","DOI":"10.1109\/TCT.1971.1083337"},{"key":"ref20","first-page":"210","article-title":"SPICE model of memristor with nonlinear dopant drift","volume":"18","author":"biolek","year":"2009","journal-title":"Radioengineering"},{"doi-asserted-by":"publisher","key":"ref22","DOI":"10.1109\/TNANO.2012.2229715"},{"doi-asserted-by":"publisher","key":"ref21","DOI":"10.1016\/j.mejo.2017.05.006"},{"doi-asserted-by":"publisher","key":"ref24","DOI":"10.1109\/TVLSI.2010.2049867"},{"doi-asserted-by":"publisher","key":"ref23","DOI":"10.1109\/TED.2014.2310200"},{"doi-asserted-by":"publisher","key":"ref26","DOI":"10.1109\/LED.2011.2161601"},{"doi-asserted-by":"publisher","key":"ref25","DOI":"10.1109\/TCSI.2010.2078710"}],"container-title":["IEEE Transactions on Very Large Scale Integration (VLSI) Systems"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/92\/8554317\/08291823.pdf?arnumber=8291823","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2022,1,27]],"date-time":"2022-01-27T04:27:31Z","timestamp":1643257651000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/8291823\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2018,12]]},"references-count":33,"journal-issue":{"issue":"12"},"URL":"https:\/\/doi.org\/10.1109\/tvlsi.2018.2799951","relation":{},"ISSN":["1063-8210","1557-9999"],"issn-type":[{"type":"print","value":"1063-8210"},{"type":"electronic","value":"1557-9999"}],"subject":[],"published":{"date-parts":[[2018,12]]}}}