{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,3,18]],"date-time":"2026-03-18T14:11:30Z","timestamp":1773843090054,"version":"3.50.1"},"reference-count":58,"publisher":"Institute of Electrical and Electronics Engineers (IEEE)","issue":"12","license":[{"start":{"date-parts":[[2018,12,1]],"date-time":"2018-12-01T00:00:00Z","timestamp":1543622400000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"}],"funder":[{"name":"KUSTAR\u2013KUIRF2 internal research fund","award":["2014-210066"],"award-info":[{"award-number":["2014-210066"]}]}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["IEEE Trans. VLSI Syst."],"published-print":{"date-parts":[[2018,12]]},"DOI":"10.1109\/tvlsi.2018.2835572","type":"journal-article","created":{"date-parts":[[2018,6,7]],"date-time":"2018-06-07T19:08:14Z","timestamp":1528398494000},"page":"2749-2758","source":"Crossref","is-referenced-by-count":40,"title":["Memristor-Based Hardware Accelerator for Image Compression"],"prefix":"10.1109","volume":"26","author":[{"ORCID":"https:\/\/orcid.org\/0000-0001-9617-5080","authenticated-orcid":false,"given":"Yasmin","family":"Halawani","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"ORCID":"https:\/\/orcid.org\/0000-0002-6063-473X","authenticated-orcid":false,"given":"Baker","family":"Mohammad","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"ORCID":"https:\/\/orcid.org\/0000-0002-9600-8036","authenticated-orcid":false,"given":"Mahmoud","family":"Al-Qutayri","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"ORCID":"https:\/\/orcid.org\/0000-0002-3242-8197","authenticated-orcid":false,"given":"Said F.","family":"Al-Sarawi","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"key":"ref39","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2012.2227519"},{"key":"ref38","doi-asserted-by":"publisher","DOI":"10.1038\/nnano.2008.160"},{"key":"ref33","doi-asserted-by":"publisher","DOI":"10.1109\/38.376616"},{"key":"ref32","doi-asserted-by":"publisher","DOI":"10.1142\/4610"},{"key":"ref31","volume":"642","author":"taubman","year":"2012","journal-title":"JPEG2000 Image Compression Fun-damentals Standards and Practice Image Compression Fundamentals Standards and Practice"},{"key":"ref30","author":"husen","year":"2001","journal-title":"The Wavelet Transform"},{"key":"ref37","doi-asserted-by":"publisher","DOI":"10.1109\/TED.2011.2158004"},{"key":"ref36","doi-asserted-by":"publisher","DOI":"10.1088\/0143-0807\/30\/4\/001"},{"key":"ref35","doi-asserted-by":"publisher","DOI":"10.1002\/smll.200801323"},{"key":"ref34","first-page":"28","author":"strang","year":"1996","journal-title":"Wavelets and Filter Banks"},{"key":"ref28","first-page":"64","article-title":"65 nm CMOS technology for low power applications","author":"steegen","year":"2005","journal-title":"IEDM Tech Dig"},{"key":"ref27","doi-asserted-by":"publisher","DOI":"10.1038\/srep40135"},{"key":"ref29","first-page":"1099","article-title":"An overview of lossless digital image compression techniques","author":"yang","year":"2005","journal-title":"Proc 48th Midwest Symp Circuits Syst"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC.2010.5433960"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/JIOT.2016.2577520"},{"key":"ref20","doi-asserted-by":"crossref","first-page":"61","DOI":"10.1038\/nature14441","article-title":"Training and operation of an integrated neuromorphic network based on metal-oxide memristors","volume":"521","author":"prezioso","year":"2015","journal-title":"Nature"},{"key":"ref22","first-page":"469","article-title":"MNSIM: Simulation platform for memristor-based neuromorphic computing system","author":"xia","year":"2016","journal-title":"Proc IEEE Design Autom Test Eur Conf (DATE)"},{"key":"ref21","doi-asserted-by":"publisher","DOI":"10.1109\/TNNLS.2015.2391182"},{"key":"ref24","doi-asserted-by":"publisher","DOI":"10.1145\/2897937.2898010"},{"key":"ref23","doi-asserted-by":"publisher","DOI":"10.1109\/TNNLS.2015.2482220"},{"key":"ref26","doi-asserted-by":"publisher","DOI":"10.1109\/TNANO.2016.2570248"},{"key":"ref25","article-title":"The dot-product engine (DPE): Exploring high efficiency analog multiplication with memristor arrays","author":"strachan","year":"2015","journal-title":"Proc 4th Rebooting Comput Summit-Oadmapping Future Comput"},{"key":"ref50","doi-asserted-by":"publisher","DOI":"10.1109\/IEDM.2016.7838428"},{"key":"ref51","doi-asserted-by":"publisher","DOI":"10.1109\/TIP.2009.2025923"},{"key":"ref58","doi-asserted-by":"publisher","DOI":"10.1016\/j.csi.2011.04.001"},{"key":"ref57","doi-asserted-by":"crossref","first-page":"20006","DOI":"10.3390\/s150820006","article-title":"Visual sensing for urban flood monitoring","volume":"15","author":"lo","year":"2015","journal-title":"SENSORS"},{"key":"ref56","first-page":"1","article-title":"Low-power approximate convolution computing unit with domain-wall motion based ‘Spin-Memristor’ for image processing applications","author":"shim","year":"2016","journal-title":"Proc 53nd ACM\/EDAC\/IEEE Design Autom Conf (DAC)"},{"key":"ref55","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2015.2440392"},{"key":"ref54","first-page":"5","article-title":"A 65 nm level-1 cache for mobile applications","author":"mohammad","year":"2008","journal-title":"Proc Int Conf Microelectron"},{"key":"ref53","doi-asserted-by":"publisher","DOI":"10.1016\/j.micpro.2011.05.008"},{"key":"ref52","doi-asserted-by":"publisher","DOI":"10.3390\/s141120779"},{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1007\/s11277-013-1588-8"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1109\/TCSII.2012.2200169"},{"key":"ref40","doi-asserted-by":"publisher","DOI":"10.3389\/fnins.2015.00484"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1109\/iMac4s.2013.6526515"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1109\/TCSVT.2015.2400776"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1109\/VLSI-DAT.2016.7482578"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1109\/ICIP.1996.561075"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.1109\/TSP.2004.823509"},{"key":"ref17","doi-asserted-by":"publisher","DOI":"10.1063\/1.3640806"},{"key":"ref18","first-page":"1718","article-title":"Memristor based computation-in-memory architecture for data-intensive applications","author":"hamdioui","year":"2015","journal-title":"Proc Design Autom Test Eur Conf Exhibition (DATE)"},{"key":"ref19","doi-asserted-by":"publisher","DOI":"10.1016\/j.mejo.2014.06.006"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/SURV.2012.060912.00149"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/ISCAS.2015.7168922"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/TSP.2011.2109953"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1016\/j.procs.2016.02.100"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1016\/j.future.2016.01.015"},{"key":"ref7","first-page":"111","article-title":"2-D DWT\/IDWT processor design for image coding","author":"xuyun","year":"1996","journal-title":"Proc 2nd Int Conf ASIC"},{"key":"ref49","doi-asserted-by":"publisher","DOI":"10.1038\/srep18863"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1016\/j.comnet.2008.05.006"},{"key":"ref46","doi-asserted-by":"publisher","DOI":"10.1109\/JBHI.2013.2266101"},{"key":"ref45","doi-asserted-by":"crossref","first-page":"17","DOI":"10.1186\/s40064-015-1612-4","article-title":"Color reproduction and processing algorithm based on real-time mapping for endoscopic images","volume":"5","author":"khan","year":"2016","journal-title":"SpringerPlus"},{"key":"ref48","first-page":"59","article-title":"A multi-level DRAM with fast read and low power consumption","author":"liu","year":"2005","journal-title":"Proc IEEE Workshop Microelectron Electron Devices (WMED '05)"},{"key":"ref47","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2010.2051569"},{"key":"ref42","doi-asserted-by":"publisher","DOI":"10.1016\/j.mejo.2012.10.001"},{"key":"ref41","doi-asserted-by":"publisher","DOI":"10.1109\/HPCA.2015.7056056"},{"key":"ref44","author":"zhou","year":"2007","journal-title":"Getting the most out of your image-processing pipeline"},{"key":"ref43","doi-asserted-by":"publisher","DOI":"10.1155\/2010\/920693"}],"container-title":["IEEE Transactions on Very Large Scale Integration (VLSI) Systems"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/92\/8554317\/08374986.pdf?arnumber=8374986","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2022,1,27]],"date-time":"2022-01-27T02:27:16Z","timestamp":1643250436000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/8374986\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2018,12]]},"references-count":58,"journal-issue":{"issue":"12"},"URL":"https:\/\/doi.org\/10.1109\/tvlsi.2018.2835572","relation":{},"ISSN":["1063-8210","1557-9999"],"issn-type":[{"value":"1063-8210","type":"print"},{"value":"1557-9999","type":"electronic"}],"subject":[],"published":{"date-parts":[[2018,12]]}}}