{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,3,7]],"date-time":"2026-03-07T14:08:28Z","timestamp":1772892508980,"version":"3.50.1"},"reference-count":29,"publisher":"Institute of Electrical and Electronics Engineers (IEEE)","issue":"11","license":[{"start":{"date-parts":[[2018,11,1]],"date-time":"2018-11-01T00:00:00Z","timestamp":1541030400000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"}],"funder":[{"DOI":"10.13039\/501100000038","name":"Natural Sciences and Engineering Research Council of Canada","doi-asserted-by":"publisher","id":[{"id":"10.13039\/501100000038","id-type":"DOI","asserted-by":"publisher"}]}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["IEEE Trans. VLSI Syst."],"published-print":{"date-parts":[[2018,11]]},"DOI":"10.1109\/tvlsi.2018.2858014","type":"journal-article","created":{"date-parts":[[2018,8,9]],"date-time":"2018-08-09T18:58:38Z","timestamp":1533841118000},"page":"2518-2529","source":"Crossref","is-referenced-by-count":34,"title":["Dynamic GPU Parallel Sparse LU Factorization for Fast Circuit Simulation"],"prefix":"10.1109","volume":"26","author":[{"ORCID":"https:\/\/orcid.org\/0000-0003-4659-8979","authenticated-orcid":false,"given":"Wai-Kong","family":"Lee","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"ORCID":"https:\/\/orcid.org\/0000-0002-2822-3674","authenticated-orcid":false,"given":"Ramachandra","family":"Achar","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"ORCID":"https:\/\/orcid.org\/0000-0001-8327-0396","authenticated-orcid":false,"given":"Michel S.","family":"Nakhla","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1109\/TCPMT.2012.2237228"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2012.2217964"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1109\/TPDS.2014.2312199"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2015.2421287"},{"key":"ref14","year":"2017","journal-title":"Cusolver library"},{"key":"ref15","year":"2017","journal-title":"GPU-Accelerated Sparse Parallel LU Factorization Solver Version 2 0"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.1109\/TIP.2017.2713099"},{"key":"ref17","first-page":"1","article-title":"Implementation of iron loss model on graphic processing units","volume":"52","author":"hussain","year":"2017","journal-title":"IEEE Trans Magn"},{"key":"ref18","doi-asserted-by":"crossref","first-page":"252","DOI":"10.1016\/j.jcp.2017.02.069","article-title":"A GPU-based large-scale Monte Carlo simulation method for systems with long-range interactions","volume":"338","author":"li","year":"2017","journal-title":"J Comput Phys"},{"key":"ref19","first-page":"1","article-title":"SearchaStore: Fast and secure searchable cloud services","author":"lee","year":"2017","journal-title":"Cluster Comput"},{"key":"ref28","year":"2017","journal-title":"Comput Canada"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1007\/978-3-642-19328-6_9"},{"key":"ref27","author":"davis","year":"2017","journal-title":"The University of Florida sparse matrix collection"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/IPDPS.2011.44"},{"key":"ref6","year":"2018","journal-title":"Dense Linear Algebra on GPUs"},{"key":"ref29","year":"2018","journal-title":"Floating Point and IEEE 754 Compliance for NVIDIA GPUs"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1137\/1034004"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1137\/0909058"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1145\/1824801.1824814"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1016\/j.parco.2011.09.002"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1109\/81.678468"},{"key":"ref1","year":"2017","journal-title":"CUDA Programming Guide V8 0"},{"key":"ref20","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2014.2309606"},{"key":"ref22","doi-asserted-by":"publisher","DOI":"10.1137\/S0895479899358443"},{"key":"ref21","doi-asserted-by":"publisher","DOI":"10.1109\/TMI.2017.2673121"},{"key":"ref24","doi-asserted-by":"publisher","DOI":"10.1023\/A:1008699807402"},{"key":"ref23","author":"singhal","year":"1993","journal-title":"Computer Methods for Circuit Analysis and Design"},{"key":"ref26","doi-asserted-by":"publisher","DOI":"10.1109\/TPDS.2012.242"},{"key":"ref25","doi-asserted-by":"publisher","DOI":"10.1016\/j.parco.2009.12.005"}],"container-title":["IEEE Transactions on Very Large Scale Integration (VLSI) Systems"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/92\/8502886\/08430608.pdf?arnumber=8430608","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2022,1,12]],"date-time":"2022-01-12T16:10:38Z","timestamp":1642003838000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/8430608\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2018,11]]},"references-count":29,"journal-issue":{"issue":"11"},"URL":"https:\/\/doi.org\/10.1109\/tvlsi.2018.2858014","relation":{},"ISSN":["1063-8210","1557-9999"],"issn-type":[{"value":"1063-8210","type":"print"},{"value":"1557-9999","type":"electronic"}],"subject":[],"published":{"date-parts":[[2018,11]]}}}