{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,2,21]],"date-time":"2025-02-21T10:20:59Z","timestamp":1740133259376,"version":"3.37.3"},"reference-count":19,"publisher":"Institute of Electrical and Electronics Engineers (IEEE)","issue":"11","license":[{"start":{"date-parts":[[2018,11,1]],"date-time":"2018-11-01T00:00:00Z","timestamp":1541030400000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"}],"funder":[{"DOI":"10.13039\/100002418","name":"Intel Corporation","doi-asserted-by":"publisher","id":[{"id":"10.13039\/100002418","id-type":"DOI","asserted-by":"publisher"}]}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["IEEE Trans. VLSI Syst."],"published-print":{"date-parts":[[2018,11]]},"DOI":"10.1109\/tvlsi.2018.2864316","type":"journal-article","created":{"date-parts":[[2018,9,4]],"date-time":"2018-09-04T18:22:06Z","timestamp":1536085326000},"page":"2395-2405","source":"Crossref","is-referenced-by-count":1,"title":["Automated Phase-Noise-Aware Design of RF Clock Distribution Circuits"],"prefix":"10.1109","volume":"26","author":[{"ORCID":"https:\/\/orcid.org\/0000-0002-7347-865X","authenticated-orcid":false,"given":"Dimo","family":"Martev","sequence":"first","affiliation":[]},{"given":"Sven","family":"Hampel","sequence":"additional","affiliation":[]},{"ORCID":"https:\/\/orcid.org\/0000-0003-4431-7619","authenticated-orcid":false,"given":"Ulf","family":"Schlichtmann","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1145\/37888.37906"},{"key":"ref11","first-page":"295","article-title":"TILOS: A posynomial programming approach to transistor sizing","author":"fishburn","year":"1985","journal-title":"Proc Best ICCAD"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1109\/43.248073"},{"key":"ref13","doi-asserted-by":"crossref","first-page":"818","DOI":"10.1109\/TCAD.2009.2015735","article-title":"Gate sizing for cell-library-based designs","volume":"28","author":"hu","year":"2009","journal-title":"IEEE Transactions on Computer-Aided Design of Integrated"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1109\/92.645073"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1109\/43.298040"},{"journal-title":"Adaptation in Natural and Artificial Systems","year":"1975","author":"holland","key":"ref16"},{"key":"ref17","first-page":"124","article-title":"Hybrid genetic algorithms: A review","volume":"13","author":"el-mihoub","year":"2006","journal-title":"Eng Lett"},{"key":"ref18","doi-asserted-by":"publisher","DOI":"10.1016\/0305-0548(86)90048-1"},{"journal-title":"Operations Research Models and Methods","year":"2002","author":"jensen","key":"ref19"},{"journal-title":"Analysis and Design of Analog Integrated Circuits","year":"2001","author":"gray","key":"ref4"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/CICC.2000.852702"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1145\/3060403.3060430"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2006.876206"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1109\/ISCAS.1990.112223"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/ISCAS.2017.8051013"},{"journal-title":"LTE Feasibility Study for Further Advancements for E-UTRA (LTE-Advanced) Release 11","year":"2012","key":"ref2"},{"journal-title":"RF Microelectronics","year":"1998","author":"razavi","key":"ref1"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1109\/ICCAD.1995.480004"}],"container-title":["IEEE Transactions on Very Large Scale Integration (VLSI) Systems"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/92\/8502886\/08454508.pdf?arnumber=8454508","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2022,1,26]],"date-time":"2022-01-26T21:21:04Z","timestamp":1643232064000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/8454508\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2018,11]]},"references-count":19,"journal-issue":{"issue":"11"},"URL":"https:\/\/doi.org\/10.1109\/tvlsi.2018.2864316","relation":{},"ISSN":["1063-8210","1557-9999"],"issn-type":[{"type":"print","value":"1063-8210"},{"type":"electronic","value":"1557-9999"}],"subject":[],"published":{"date-parts":[[2018,11]]}}}