{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,8,31]],"date-time":"2026-08-31T16:01:58Z","timestamp":1788192118262,"version":"build-2803163510"},"reference-count":48,"publisher":"Institute of Electrical and Electronics Engineers (IEEE)","issue":"7","license":[{"start":{"date-parts":[[2019,7,1]],"date-time":"2019-07-01T00:00:00Z","timestamp":1561939200000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"},{"start":{"date-parts":[[2019,7,1]],"date-time":"2019-07-01T00:00:00Z","timestamp":1561939200000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2019,7,1]],"date-time":"2019-07-01T00:00:00Z","timestamp":1561939200000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"funder":[{"DOI":"10.13039\/501100001659","name":"Deutsche Forschungsgemeinschaft","doi-asserted-by":"publisher","id":[{"id":"10.13039\/501100001659","id-type":"DOI","asserted-by":"publisher"}]}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["IEEE Trans. VLSI Syst."],"published-print":{"date-parts":[[2019,7]]},"DOI":"10.1109\/tvlsi.2019.2899890","type":"journal-article","created":{"date-parts":[[2019,3,12]],"date-time":"2019-03-12T22:39:55Z","timestamp":1552430395000},"page":"1652-1665","source":"Crossref","is-referenced-by-count":14,"title":["Modeling the Interdependences Between Voltage Fluctuation and BTI Aging"],"prefix":"10.1109","volume":"27","author":[{"ORCID":"https:\/\/orcid.org\/0000-0002-1044-7231","authenticated-orcid":false,"given":"Sami","family":"Salamin","sequence":"first","affiliation":[],"role":[{"vocabulary":"crossref","role":"author"}]},{"ORCID":"https:\/\/orcid.org\/0000-0002-6629-4713","authenticated-orcid":false,"given":"Victor M.","family":"Van Santen","sequence":"additional","affiliation":[],"role":[{"vocabulary":"crossref","role":"author"}]},{"ORCID":"https:\/\/orcid.org\/0000-0002-5649-3102","authenticated-orcid":false,"given":"Hussam","family":"Amrouch","sequence":"additional","affiliation":[],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Narendra","family":"Parihar","sequence":"additional","affiliation":[],"role":[{"vocabulary":"crossref","role":"author"}]},{"ORCID":"https:\/\/orcid.org\/0000-0002-4516-766X","authenticated-orcid":false,"given":"Souvik","family":"Mahapatra","sequence":"additional","affiliation":[],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Jorg","family":"Henkel","sequence":"additional","affiliation":[],"role":[{"vocabulary":"crossref","role":"author"}]}],"member":"263","reference":[{"key":"ref39","first-page":"298","article-title":"Comparison of split-versus connected-core supplies in the POWER6 microprocessor","author":"james","year":"2007","journal-title":"IEEE ISSCC Dig Tech Papers"},{"key":"ref38","doi-asserted-by":"publisher","DOI":"10.1109\/DATE.2011.5763296"},{"key":"ref33","doi-asserted-by":"publisher","DOI":"10.1109\/IRPS.2018.8353699"},{"key":"ref32","first-page":"4a.3.1","article-title":"Combined trap generation and transient trap occupancy model for time evolution of NBTI during DC multi-cycle and AC stress","author":"goel","year":"2015","journal-title":"Proc IEEE Int Rel Phys Symp (IRPS)"},{"key":"ref31","first-page":"448","article-title":"Analysis of NBTI degradation- and recovery-behavior based on ultra fast VT-measurements","author":"reisinger","year":"2006","journal-title":"Proc IEEE Intl Rel Phys Symp"},{"key":"ref30","doi-asserted-by":"publisher","DOI":"10.1109\/TDMR.2007.911385"},{"key":"ref37","doi-asserted-by":"publisher","DOI":"10.1109\/ASPDAC.2008.4483978"},{"key":"ref36","doi-asserted-by":"publisher","DOI":"10.1109\/IEDM.2017.8268345"},{"key":"ref35","doi-asserted-by":"publisher","DOI":"10.1109\/TED.2017.2773122"},{"key":"ref34","doi-asserted-by":"publisher","DOI":"10.1109\/IRPS.2018.8353700"},{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1109\/ICCAD.2010.5654309"},{"key":"ref40","doi-asserted-by":"publisher","DOI":"10.1109\/TCSII.2007.901574"},{"key":"ref11","year":"2019","journal-title":"Aging-IR-Aware Cell Libraries"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1145\/2897937.2898082"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1109\/VTS.2017.7928936"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1109\/IRPS.2015.7112757"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2016.2643618"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.3850\/9783981537079_0751"},{"key":"ref17","doi-asserted-by":"publisher","DOI":"10.1016\/j.microrel.2015.06.008"},{"key":"ref18","article-title":"Non uniform on chip power delivery network synthesis methodology","volume":"abs 1711 425","author":"benediktsson","year":"2017","journal-title":"Comput Res Repository"},{"key":"ref19","author":"wang","year":"2009","journal-title":"Electronic Design Automation Synthesis Verification and Test"},{"key":"ref28","first-page":"1","article-title":"Aging-aware timing analysis and optimization considering path sensitization","author":"wu","year":"2011","journal-title":"Proceedings of the Design Automation and Test in Europe (DATE)"},{"key":"ref4","author":"hu","year":"2010","journal-title":"Modern Semiconductor Devices for Integrated Circuits"},{"key":"ref27","doi-asserted-by":"publisher","DOI":"10.1109\/IRPS.2015.7112757"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/TED.2018.2869669"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/IRPS.2018.8353651"},{"key":"ref29","doi-asserted-by":"publisher","DOI":"10.1016\/j.microrel.2013.12.017"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/ASPDAC.2013.6509663"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1109\/TED.2017.2780083"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/TCSI.2017.2717790"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/IRPS.2017.7936352"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1109\/IRPS.2013.6531957"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/TED.2013.2238237"},{"key":"ref46","year":"2018","journal-title":"Nangate 45 PDK is a 45 nm Open Source Digital Cell Library Based on PTM"},{"key":"ref20","year":"2018","journal-title":"Static-and-Dynamic-Power-IR-Analysis Cadence Official Forum"},{"key":"ref45","article-title":"PULPino: A small single-core RISC-V SoC","author":"traber","year":"2016","journal-title":"Proc 3rd RISCV Workshop"},{"key":"ref48","doi-asserted-by":"crossref","first-page":"585","DOI":"10.1109\/ISQED.2006.91","article-title":"New Generation of Predictive Technology Model for Sub-45nm Design Exploration","author":"zhao","year":"2006","journal-title":"Proc Int Symp Quality Electronic Design (ISQED)"},{"key":"ref22","first-page":"198","article-title":"A novel framework for faster-than-at-speed delay test considering IR-drop effects","author":"ahmed","year":"2006","journal-title":"Proc IEEE\/ACM Int Conf Comput Aided Design"},{"key":"ref47","year":"2018","journal-title":"BSIM Compact MOSFET Models for SPICE Simulation"},{"key":"ref21","doi-asserted-by":"publisher","DOI":"10.1109\/ISQED.2010.5450515"},{"key":"ref42","year":"2018","journal-title":"Innovus Implementation System"},{"key":"ref24","author":"elgamel","year":"2005","journal-title":"Interconnect Noise Optimization in Nanometer Technologies"},{"key":"ref41","year":"2018","journal-title":"Design Compiler RTL Synthesis"},{"key":"ref23","doi-asserted-by":"publisher","DOI":"10.5194\/ars-4-197-2006"},{"key":"ref44","year":"2018","journal-title":"Tempus Timing Signoff Solution"},{"key":"ref26","doi-asserted-by":"publisher","DOI":"10.1109\/IRPS.2017.7936335"},{"key":"ref43","year":"2018","journal-title":"Voltus IC Power Integrity Solution"},{"key":"ref25","doi-asserted-by":"publisher","DOI":"10.1109\/IRPS.2018.8353648"}],"container-title":["IEEE Transactions on Very Large Scale Integration (VLSI) Systems"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/92\/8746725\/08665917.pdf?arnumber=8665917","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2022,7,13]],"date-time":"2022-07-13T20:53:56Z","timestamp":1657745636000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/8665917\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2019,7]]},"references-count":48,"journal-issue":{"issue":"7"},"URL":"https:\/\/doi.org\/10.1109\/tvlsi.2019.2899890","relation":{},"ISSN":["1063-8210","1557-9999"],"issn-type":[{"value":"1063-8210","type":"print"},{"value":"1557-9999","type":"electronic"}],"subject":[],"published":{"date-parts":[[2019,7]]}}}