{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,4,25]],"date-time":"2026-04-25T01:44:42Z","timestamp":1777081482855,"version":"3.51.4"},"reference-count":26,"publisher":"Institute of Electrical and Electronics Engineers (IEEE)","issue":"8","license":[{"start":{"date-parts":[[2019,8,1]],"date-time":"2019-08-01T00:00:00Z","timestamp":1564617600000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"},{"start":{"date-parts":[[2019,8,1]],"date-time":"2019-08-01T00:00:00Z","timestamp":1564617600000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2019,8,1]],"date-time":"2019-08-01T00:00:00Z","timestamp":1564617600000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"funder":[{"name":"Samsung-Seoul National University Collaboration Project","award":["SLSI-201604ND059"],"award-info":[{"award-number":["SLSI-201604ND059"]}]},{"name":"Samsung-Seoul National University Collaboration Project","award":["Foundry-201708DD031"],"award-info":[{"award-number":["Foundry-201708DD031"]}]}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["IEEE Trans. VLSI Syst."],"published-print":{"date-parts":[[2019,8]]},"DOI":"10.1109\/tvlsi.2019.2910579","type":"journal-article","created":{"date-parts":[[2019,5,8]],"date-time":"2019-05-08T20:12:00Z","timestamp":1557346320000},"page":"1933-1946","source":"Crossref","is-referenced-by-count":37,"title":["Design Rule Evaluation Framework Using Automatic Cell Layout Generator for Design Technology Co-Optimization"],"prefix":"10.1109","volume":"27","author":[{"ORCID":"https:\/\/orcid.org\/0000-0002-2270-5007","authenticated-orcid":false,"given":"Kyeongrok","family":"Jo","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Seyong","family":"Ahn","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Jungho","family":"Do","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"ORCID":"https:\/\/orcid.org\/0000-0003-2752-3138","authenticated-orcid":false,"given":"Taejoong","family":"Song","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"ORCID":"https:\/\/orcid.org\/0000-0002-6114-3772","authenticated-orcid":false,"given":"Taewhan","family":"Kim","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Kyumyung","family":"Choi","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1145\/2228360.2228470"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1109\/ASPDAC.2013.6509638"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1109\/43.55207"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1109\/ICCAD.2013.6691172"},{"key":"ref14","first-page":"9.7.1","article-title":"Innovations in special constructs for standard cell libraries in sub 28 nm technologies","author":"rashed","year":"2013","journal-title":"Proc IEEE Int Electron Devices Meeting"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1109\/TCSI.2009.2028417"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.1109\/TEC.1961.5219222"},{"key":"ref17","doi-asserted-by":"publisher","DOI":"10.1145\/22145.22153"},{"key":"ref18","doi-asserted-by":"publisher","DOI":"10.1109\/ICIP.1995.529721"},{"key":"ref19","doi-asserted-by":"publisher","DOI":"10.1109\/ICCAD.2011.6105299"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/MM.2017.4241347"},{"key":"ref3","first-page":"324","article-title":"Moore’s law continues into the 1x-nm era","author":"james","year":"2016","journal-title":"Proc Annu SEMI Adv Semicond Manuf Conf"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2012.2192477"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/ICCAD.2014.7001409"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1109\/ASPDAC.2014.6742867"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1145\/2429384.2429395"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC.2007.373573"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1007\/s11432-016-5560-6"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/ASPDAC.2018.8297373"},{"key":"ref20","doi-asserted-by":"publisher","DOI":"10.1109\/ICCAD.2008.4681616"},{"key":"ref22","year":"2016","journal-title":"Stochastic local search for satisfiability"},{"key":"ref21","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2009.2035577"},{"key":"ref24","year":"2016","journal-title":"Freepdk45 45 nm Process Design Kit is an Open-Source"},{"key":"ref23","year":"2017","journal-title":"Gurobi Optimizer"},{"key":"ref26","year":"2015","journal-title":"14 nm Lithography Process"},{"key":"ref25","year":"2008","journal-title":"Nangate 45 nm Open Cell Library"}],"container-title":["IEEE Transactions on Very Large Scale Integration (VLSI) Systems"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/92\/8771277\/08709776.pdf?arnumber=8709776","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2022,7,13]],"date-time":"2022-07-13T20:47:46Z","timestamp":1657745266000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/8709776\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2019,8]]},"references-count":26,"journal-issue":{"issue":"8"},"URL":"https:\/\/doi.org\/10.1109\/tvlsi.2019.2910579","relation":{},"ISSN":["1063-8210","1557-9999"],"issn-type":[{"value":"1063-8210","type":"print"},{"value":"1557-9999","type":"electronic"}],"subject":[],"published":{"date-parts":[[2019,8]]}}}