{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,3,18]],"date-time":"2026-03-18T13:28:04Z","timestamp":1773840484997,"version":"3.50.1"},"reference-count":34,"publisher":"Institute of Electrical and Electronics Engineers (IEEE)","issue":"8","license":[{"start":{"date-parts":[[2019,8,1]],"date-time":"2019-08-01T00:00:00Z","timestamp":1564617600000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"},{"start":{"date-parts":[[2019,8,1]],"date-time":"2019-08-01T00:00:00Z","timestamp":1564617600000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2019,8,1]],"date-time":"2019-08-01T00:00:00Z","timestamp":1564617600000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"funder":[{"DOI":"10.13039\/501100001809","name":"National Natural Science Foundation of China","doi-asserted-by":"publisher","award":["61827804"],"award-info":[{"award-number":["61827804"]}],"id":[{"id":"10.13039\/501100001809","id-type":"DOI","asserted-by":"publisher"}]},{"DOI":"10.13039\/501100001809","name":"National Natural Science Foundation of China","doi-asserted-by":"publisher","award":["61836012"],"award-info":[{"award-number":["61836012"]}],"id":[{"id":"10.13039\/501100001809","id-type":"DOI","asserted-by":"publisher"}]},{"DOI":"10.13039\/501100001809","name":"National Natural Science Foundation of China","doi-asserted-by":"publisher","award":["61620106005"],"award-info":[{"award-number":["61620106005"]}],"id":[{"id":"10.13039\/501100001809","id-type":"DOI","asserted-by":"publisher"}]},{"DOI":"10.13039\/501100001809","name":"National Natural Science Foundation of China","doi-asserted-by":"publisher","award":["61325003"],"award-info":[{"award-number":["61325003"]}],"id":[{"id":"10.13039\/501100001809","id-type":"DOI","asserted-by":"publisher"}]}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["IEEE Trans. VLSI Syst."],"published-print":{"date-parts":[[2019,8]]},"DOI":"10.1109\/tvlsi.2019.2913958","type":"journal-article","created":{"date-parts":[[2019,5,16]],"date-time":"2019-05-16T20:06:11Z","timestamp":1558037171000},"page":"1874-1885","source":"Crossref","is-referenced-by-count":139,"title":["High-Performance FPGA-Based CNN Accelerator With Block-Floating-Point Arithmetic"],"prefix":"10.1109","volume":"27","author":[{"ORCID":"https:\/\/orcid.org\/0000-0003-3917-5273","authenticated-orcid":false,"given":"Xiaocong","family":"Lian","sequence":"first","affiliation":[]},{"given":"Zhenyu","family":"Liu","sequence":"additional","affiliation":[]},{"given":"Zhourui","family":"Song","sequence":"additional","affiliation":[]},{"given":"Jiwu","family":"Dai","sequence":"additional","affiliation":[]},{"ORCID":"https:\/\/orcid.org\/0000-0001-9715-6957","authenticated-orcid":false,"given":"Wei","family":"Zhou","sequence":"additional","affiliation":[]},{"ORCID":"https:\/\/orcid.org\/0000-0002-7333-9975","authenticated-orcid":false,"given":"Xiangyang","family":"Ji","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"key":"ref33","doi-asserted-by":"publisher","DOI":"10.1145\/3061639.3062244"},{"key":"ref32","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2018.2815603"},{"key":"ref31","author":"corporation","year":"2019","journal-title":"CUDA Toolkit Documentation Floating Point and IEEE 754"},{"key":"ref30","doi-asserted-by":"publisher","DOI":"10.1109\/78.492531"},{"key":"ref34","doi-asserted-by":"publisher","DOI":"10.1145\/3240765.3240801"},{"key":"ref10","first-page":"1","article-title":"A high performance FPGA-based accelerator for large-scale convolutional neural networks","author":"li","year":"2016","journal-title":"Proc Int Conf Field Program Logic and Appl"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1109\/MICRO.2016.7783720"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2016.2616357"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1109\/ISCAS.2017.8050809"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1109\/TNNLS.2018.2852335"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1109\/MICRO.2016.7783723"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2017.2688340"},{"key":"ref17","author":"han","year":"2015","journal-title":"Deep compression Compressing deep neural networks with pruning trained quantization and huffman coding"},{"key":"ref18","first-page":"1737","article-title":"Deep learning with limited numerical precision","author":"gupta","year":"2015","journal-title":"Proc Int Conf Mach Learn (ICML)"},{"key":"ref19","author":"migacz","year":"2017","journal-title":"8-bit inference with tensorrt"},{"key":"ref28","doi-asserted-by":"publisher","DOI":"10.1109\/5.726791"},{"key":"ref4","author":"conneau","year":"2016","journal-title":"Very Deep Convolutional Networks for Text Classification"},{"key":"ref27","first-page":"10","article-title":"1.1 Computing’s energy problem (and what we can do about it)","author":"horowitz","year":"2014","journal-title":"Proc IEEE Int Solid-State Circuits Conf Dig Tech Papers (ISSCC)"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/CVPR.2015.7298965"},{"key":"ref6","author":"corporation","year":"2019","journal-title":"Nvidia cudnn - gpu accelerated deep learning"},{"key":"ref29","article-title":"Learning multiple layers of features from tiny images","author":"krizhevsky","year":"2009"},{"key":"ref5","author":"simonyan","year":"2014","journal-title":"Very Deep Convolutional Networks for Large-scale Image Recognition"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1145\/2847263.2847265"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1145\/2684746.2689060"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/CVPR.2015.7298594"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2017.2705069"},{"key":"ref1","first-page":"1097","article-title":"ImageNet classification with deep convolutional neural networks","author":"krizhevsky","year":"2012","journal-title":"Proc Adv Neural Inf Process Syst"},{"key":"ref20","first-page":"1742","article-title":"Flexpoint: An adaptive numerical format for efficient training of deep neural networks","author":"k\u00f6ster","year":"2017","journal-title":"Proc Annu Conf Neural Inf Process Syst (NIPS)"},{"key":"ref22","doi-asserted-by":"publisher","DOI":"10.1007\/s11263-015-0816-y"},{"key":"ref21","first-page":"816","article-title":"Computation error analysis of block floating point arithmetic oriented convolution neural network accelerator design","author":"song","year":"2018","journal-title":"Proc 30th AAAI Conf Artif Intell"},{"key":"ref24","doi-asserted-by":"publisher","DOI":"10.1145\/2647868.2654889"},{"key":"ref23","doi-asserted-by":"publisher","DOI":"10.1109\/GlobalSIP.2017.8309067"},{"key":"ref26","year":"2016","journal-title":"Image"},{"key":"ref25","doi-asserted-by":"publisher","DOI":"10.1109\/CVPR.2016.90"}],"container-title":["IEEE Transactions on Very Large Scale Integration (VLSI) Systems"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/92\/8771277\/08716697.pdf?arnumber=8716697","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2022,7,13]],"date-time":"2022-07-13T20:47:46Z","timestamp":1657745266000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/8716697\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2019,8]]},"references-count":34,"journal-issue":{"issue":"8"},"URL":"https:\/\/doi.org\/10.1109\/tvlsi.2019.2913958","relation":{},"ISSN":["1063-8210","1557-9999"],"issn-type":[{"value":"1063-8210","type":"print"},{"value":"1557-9999","type":"electronic"}],"subject":[],"published":{"date-parts":[[2019,8]]}}}