{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,4,1]],"date-time":"2026-04-01T17:53:50Z","timestamp":1775066030110,"version":"3.50.1"},"reference-count":42,"publisher":"Institute of Electrical and Electronics Engineers (IEEE)","issue":"11","license":[{"start":{"date-parts":[[2019,11,1]],"date-time":"2019-11-01T00:00:00Z","timestamp":1572566400000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"},{"start":{"date-parts":[[2019,11,1]],"date-time":"2019-11-01T00:00:00Z","timestamp":1572566400000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2019,11,1]],"date-time":"2019-11-01T00:00:00Z","timestamp":1572566400000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"funder":[{"DOI":"10.13039\/501100000780","name":"European Commission","doi-asserted-by":"publisher","id":[{"id":"10.13039\/501100000780","id-type":"DOI","asserted-by":"publisher"}]},{"name":"ANR\/DFG as part of the MASTA Project"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["IEEE Trans. VLSI Syst."],"published-print":{"date-parts":[[2019,11]]},"DOI":"10.1109\/tvlsi.2019.2931481","type":"journal-article","created":{"date-parts":[[2019,8,12]],"date-time":"2019-08-12T19:30:51Z","timestamp":1565638251000},"page":"2511-2522","source":"Crossref","is-referenced-by-count":32,"title":["A Spintronics Memory PUF for Resilience Against Cloning Counterfeit"],"prefix":"10.1109","volume":"27","author":[{"ORCID":"https:\/\/orcid.org\/0000-0003-0339-6365","authenticated-orcid":false,"given":"Samir","family":"Ben Dodo","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"ORCID":"https:\/\/orcid.org\/0000-0002-0516-7112","authenticated-orcid":false,"given":"Rajendra","family":"Bishnoi","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"ORCID":"https:\/\/orcid.org\/0000-0003-1177-8291","authenticated-orcid":false,"given":"Sarath","family":"Mohanachandran Nair","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Mehdi B.","family":"Tahoori","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"key":"ref39","article-title":"SPITT: A magnetic tunnel junction SPICE compact model for STT-MRAM","author":"bernard-granger","year":"2015","journal-title":"Proc MOS-AK Workshop Design Test Eur Conf"},{"key":"ref38","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.1989.572629"},{"key":"ref33","doi-asserted-by":"publisher","DOI":"10.1109\/TMAG.2015.2512588"},{"key":"ref32","doi-asserted-by":"publisher","DOI":"10.1007\/s41635-018-0052-3"},{"key":"ref31","doi-asserted-by":"publisher","DOI":"10.1007\/978-3-642-33027-8_1"},{"key":"ref30","first-page":"1","article-title":"Backside polishing detector: A new protection against backside attacks","author":"manich","year":"2015","journal-title":"Proc DCIS"},{"key":"ref37","doi-asserted-by":"publisher","DOI":"10.1016\/0041-5553(76)90154-3"},{"key":"ref36","doi-asserted-by":"publisher","DOI":"10.1109\/SMICND.2018.8539846"},{"key":"ref35","doi-asserted-by":"publisher","DOI":"10.1149\/2.0151709jss"},{"key":"ref34","doi-asserted-by":"publisher","DOI":"10.3390\/ma9010041"},{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1145\/2790302"},{"key":"ref40","doi-asserted-by":"publisher","DOI":"10.1109\/MIEL.2012.6222840"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1145\/2854154"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2015.2427251"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1007\/978-3-540-24676-3_31"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2014.2370531"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1109\/MDAT.2017.2729398"},{"key":"ref16","article-title":"Deconstructing a &#x2018;secure&#x2019; processor","author":"tarnovsky","year":"2010"},{"key":"ref17","doi-asserted-by":"publisher","DOI":"10.1109\/HST.2013.6581556"},{"key":"ref18","doi-asserted-by":"publisher","DOI":"10.1109\/TEST.2013.6651880"},{"key":"ref19","doi-asserted-by":"publisher","DOI":"10.1109\/TED.2017.2755867"},{"key":"ref28","doi-asserted-by":"publisher","DOI":"10.1007\/11894063_29"},{"key":"ref4","first-page":"2","article-title":"Design principles for tamper-resistant smartcard processors","author":"k\u00f6mmerling","year":"1999","journal-title":"Proc USENIX Workshop Smartcard Technol"},{"key":"ref27","doi-asserted-by":"publisher","DOI":"10.1109\/IPFA.2009.5232703"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/CICC.2007.4405850"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/JPROC.2014.2320516"},{"key":"ref29","doi-asserted-by":"publisher","DOI":"10.1109\/HST.2012.6224332"},{"key":"ref5","first-page":"9","article-title":"Physical unclonable functions for device authentication and secret key generation","author":"suh","year":"2007","journal-title":"Proc DAC"},{"key":"ref8","author":"maes","year":"2012","journal-title":"Physically Unclonable Functions Constructions Properties and Applications"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1145\/586110.586132"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/JPROC.2014.2332291"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1109\/ACCESS.2015.2503432"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/MSPEC.2007.323431"},{"key":"ref20","doi-asserted-by":"publisher","DOI":"10.1007\/978-3-319-44318-8_10"},{"key":"ref22","doi-asserted-by":"publisher","DOI":"10.1007\/s00145-016-9228-6"},{"key":"ref21","article-title":"Interagency report on status of international cybersecurity standardization for the Internet of Things (IoT)","author":"hogan","year":"8200"},{"key":"ref42","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2012.2185930"},{"key":"ref24","year":"2017","journal-title":"Flexible Key Provisioning with SRAM PUF"},{"key":"ref41","doi-asserted-by":"publisher","DOI":"10.1007\/978-3-642-04138-9_24"},{"key":"ref23","doi-asserted-by":"publisher","DOI":"10.1109\/HST.2017.7951801"},{"key":"ref26","first-page":"1","article-title":"Tamper resistance&#x2014;A cautionary note","author":"anderson","year":"1996","journal-title":"Proc USENIX Workshop Electron Commerce"},{"key":"ref25","article-title":"Physical unclonable functions to the rescue","author":"schrijen","year":"2018","journal-title":"Proc Embedded World Conf"}],"container-title":["IEEE Transactions on Very Large Scale Integration (VLSI) Systems"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/92\/8880704\/08794766.pdf?arnumber=8794766","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2022,7,13]],"date-time":"2022-07-13T20:49:18Z","timestamp":1657745358000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/8794766\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2019,11]]},"references-count":42,"journal-issue":{"issue":"11"},"URL":"https:\/\/doi.org\/10.1109\/tvlsi.2019.2931481","relation":{},"ISSN":["1063-8210","1557-9999"],"issn-type":[{"value":"1063-8210","type":"print"},{"value":"1557-9999","type":"electronic"}],"subject":[],"published":{"date-parts":[[2019,11]]}}}