{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,4,11]],"date-time":"2026-04-11T07:00:18Z","timestamp":1775890818451,"version":"3.50.1"},"reference-count":57,"publisher":"Institute of Electrical and Electronics Engineers (IEEE)","issue":"1","license":[{"start":{"date-parts":[[2020,1,1]],"date-time":"2020-01-01T00:00:00Z","timestamp":1577836800000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"},{"start":{"date-parts":[[2020,1,1]],"date-time":"2020-01-01T00:00:00Z","timestamp":1577836800000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2020,1,1]],"date-time":"2020-01-01T00:00:00Z","timestamp":1577836800000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"funder":[{"DOI":"10.13039\/501100003703","name":"Korea Electrotechnology Research Institute","doi-asserted-by":"publisher","award":["17-12-N0103-10"],"award-info":[{"award-number":["17-12-N0103-10"]}],"id":[{"id":"10.13039\/501100003703","id-type":"DOI","asserted-by":"publisher"}]},{"DOI":"10.13039\/501100003725","name":"National Research Foundation of Korea","doi-asserted-by":"publisher","award":["2019R1F1A1057530"],"award-info":[{"award-number":["2019R1F1A1057530"]}],"id":[{"id":"10.13039\/501100003725","id-type":"DOI","asserted-by":"publisher"}]}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["IEEE Trans. VLSI Syst."],"published-print":{"date-parts":[[2020,1]]},"DOI":"10.1109\/tvlsi.2019.2936260","type":"journal-article","created":{"date-parts":[[2019,9,11]],"date-time":"2019-09-11T19:57:27Z","timestamp":1568231847000},"page":"101-114","source":"Crossref","is-referenced-by-count":30,"title":["A Low-Cost and High-Throughput FPGA Implementation of the Retinex Algorithm for Real-Time Video Enhancement"],"prefix":"10.1109","volume":"28","author":[{"ORCID":"https:\/\/orcid.org\/0000-0002-7523-5117","authenticated-orcid":false,"given":"Jin Woo","family":"Park","sequence":"first","affiliation":[]},{"ORCID":"https:\/\/orcid.org\/0000-0002-0824-6238","authenticated-orcid":false,"given":"Hyokeun","family":"Lee","sequence":"additional","affiliation":[]},{"ORCID":"https:\/\/orcid.org\/0000-0003-4855-3600","authenticated-orcid":false,"given":"Boyeal","family":"Kim","sequence":"additional","affiliation":[]},{"ORCID":"https:\/\/orcid.org\/0000-0002-4840-0025","authenticated-orcid":false,"given":"Dong-Goo","family":"Kang","sequence":"additional","affiliation":[]},{"given":"Seung Oh","family":"Jin","sequence":"additional","affiliation":[]},{"ORCID":"https:\/\/orcid.org\/0000-0002-7962-657X","authenticated-orcid":false,"given":"Hyun","family":"Kim","sequence":"additional","affiliation":[]},{"ORCID":"https:\/\/orcid.org\/0000-0001-6811-9647","authenticated-orcid":false,"given":"Hyuk-Jae","family":"Lee","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"key":"ref39","doi-asserted-by":"publisher","DOI":"10.1073\/pnas.83.10.3078"},{"key":"ref38","doi-asserted-by":"publisher","DOI":"10.1023\/A:1022314423998"},{"key":"ref33","doi-asserted-by":"publisher","DOI":"10.1109\/ETS.2013.6569370"},{"key":"ref32","doi-asserted-by":"publisher","DOI":"10.1049\/iet-ipr.2014.0437"},{"key":"ref31","doi-asserted-by":"publisher","DOI":"10.1049\/iet-ipr.2014.0162"},{"key":"ref30","first-page":"1","article-title":"An FPGA implementation of real-time Retinex video image enhancement","author":"tsutsui","year":"2010","journal-title":"Proc World Autom Congr"},{"key":"ref37","doi-asserted-by":"publisher","DOI":"10.1109\/TPAMI.1986.4767767"},{"key":"ref36","doi-asserted-by":"publisher","DOI":"10.1109\/83.597272"},{"key":"ref35","doi-asserted-by":"publisher","DOI":"10.1364\/JOSA.61.000001"},{"key":"ref34","doi-asserted-by":"publisher","DOI":"10.1109\/TCSVT.2015.2437077"},{"key":"ref28","doi-asserted-by":"publisher","DOI":"10.1109\/MECO.2017.7977246"},{"key":"ref27","doi-asserted-by":"publisher","DOI":"10.1109\/CISP.2011.6100606"},{"key":"ref29","doi-asserted-by":"publisher","DOI":"10.1007\/s11554-011-0203-z"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/4.808907"},{"key":"ref1","author":"niblack","year":"1986","journal-title":"An Introduction to Digital Image Processing"},{"key":"ref20","doi-asserted-by":"publisher","DOI":"10.1109\/TIP.2012.2226047"},{"key":"ref22","doi-asserted-by":"crossref","first-page":"100","DOI":"10.1117\/1.1636183","article-title":"Retinex processing for automatic image enhancement","volume":"13","author":"rahman","year":"2004","journal-title":"J Electron Imag"},{"key":"ref21","doi-asserted-by":"publisher","DOI":"10.1109\/ISCE.2012.6241687"},{"key":"ref24","doi-asserted-by":"publisher","DOI":"10.1109\/ICIP.2011.6116445"},{"key":"ref23","first-page":"3141","article-title":"Color image enhancement using Retinex with robust envelope","author":"shen","year":"2009","journal-title":"Proc IEEE Int Conf Image Process"},{"key":"ref26","first-page":"153","article-title":"An L1-based variational model for Retinex theory and its application to medical images","author":"ma","year":"2011","journal-title":"Proc IEEE Conf Comput Vis Pattern Recognit"},{"key":"ref25","doi-asserted-by":"publisher","DOI":"10.1137\/100806588"},{"key":"ref50","year":"2019","journal-title":"FPGA Logic Cells Comparison"},{"key":"ref51","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2018.2869663"},{"key":"ref57","doi-asserted-by":"publisher","DOI":"10.1089\/end.2017.0088"},{"key":"ref56","doi-asserted-by":"publisher","DOI":"10.1016\/j.eururo.2014.07.014"},{"key":"ref55","year":"2019","journal-title":"Virtex-6 FPGA Configurable Logic Block"},{"key":"ref54","article-title":"Evaluation of tone-mapping algorithms for focal-plane implementation","author":"nunes","year":"2019"},{"key":"ref53","doi-asserted-by":"publisher","DOI":"10.1007\/s11554-016-0635-6"},{"key":"ref52","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2014.2366831"},{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1109\/ISCID.2009.22"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1109\/83.951529"},{"key":"ref40","doi-asserted-by":"publisher","DOI":"10.1109\/72.80334"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1109\/30.580378"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1109\/30.754419"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1109\/TIP.2009.2021548"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1117\/1.1580829"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.1145\/566570.566575"},{"key":"ref17","doi-asserted-by":"publisher","DOI":"10.1109\/ICSIPR.2013.6497976"},{"key":"ref18","doi-asserted-by":"crossref","first-page":"475","DOI":"10.1109\/76.915354","article-title":"An advanced contrast enhancement using partially overlapped sub-block histogram equalization","volume":"11","author":"kim","year":"2001","journal-title":"IEEE Trans Circuits Syst Video Technol"},{"key":"ref19","doi-asserted-by":"publisher","DOI":"10.1109\/30.663733"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/83.743857"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC.1983.1156466"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/TIP.2017.2663846"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/TMI.2015.2417112"},{"key":"ref8","first-page":"1414","article-title":"RGB calibration for color image analysis in machine vision","volume":"5","author":"chang","year":"1996","journal-title":"IEEE Trans Pattern Anal Mach Intell"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/TCE.2015.7064113"},{"key":"ref49","year":"2019","journal-title":"7 Series FPGAs Configurable Logic Block"},{"key":"ref9","doi-asserted-by":"crossref","first-page":"108","DOI":"10.2352\/CIC.2000.8.1.art00021","article-title":"Local color correction using non-linear masking","author":"moroney","year":"2000","journal-title":"Proc 8th Color Imaging Conf"},{"key":"ref46","year":"2018","journal-title":"Display Input Lag Database"},{"key":"ref45","year":"2018","journal-title":"Xilinx Intellectual Property Video and Image Processing Pack"},{"key":"ref48","year":"2019","journal-title":"Virtex-4 FPGA User Guide"},{"key":"ref47","year":"2018","journal-title":"NASA Retinex Image Processing"},{"key":"ref42","doi-asserted-by":"publisher","DOI":"10.1109\/TIP.2013.2261309"},{"key":"ref41","doi-asserted-by":"publisher","DOI":"10.1109\/83.557356"},{"key":"ref44","year":"2018","journal-title":"AMBA AXI4-Stream Protocol Specification"},{"key":"ref43","doi-asserted-by":"publisher","DOI":"10.1109\/TMM.2017.2740025"}],"container-title":["IEEE Transactions on Very Large Scale Integration (VLSI) Systems"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/92\/8945454\/08832235.pdf?arnumber=8832235","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2023,9,20]],"date-time":"2023-09-20T04:28:44Z","timestamp":1695184124000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/8832235\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2020,1]]},"references-count":57,"journal-issue":{"issue":"1"},"URL":"https:\/\/doi.org\/10.1109\/tvlsi.2019.2936260","relation":{},"ISSN":["1063-8210","1557-9999"],"issn-type":[{"value":"1063-8210","type":"print"},{"value":"1557-9999","type":"electronic"}],"subject":[],"published":{"date-parts":[[2020,1]]}}}