{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,7,3]],"date-time":"2026-07-03T17:13:42Z","timestamp":1783098822011,"version":"3.54.6"},"reference-count":20,"publisher":"Institute of Electrical and Electronics Engineers (IEEE)","issue":"6","license":[{"start":{"date-parts":[[2020,6,1]],"date-time":"2020-06-01T00:00:00Z","timestamp":1590969600000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"},{"start":{"date-parts":[[2020,6,1]],"date-time":"2020-06-01T00:00:00Z","timestamp":1590969600000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2020,6,1]],"date-time":"2020-06-01T00:00:00Z","timestamp":1590969600000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["IEEE Trans. VLSI Syst."],"published-print":{"date-parts":[[2020,6]]},"DOI":"10.1109\/tvlsi.2020.2983458","type":"journal-article","created":{"date-parts":[[2020,4,15]],"date-time":"2020-04-15T22:13:46Z","timestamp":1586988826000},"page":"1403-1412","source":"Crossref","is-referenced-by-count":38,"title":["Very Fast, High-Performance 5-2 and 7-2 Compressors in CMOS Process for Rapid Parallel Accumulations"],"prefix":"10.1109","volume":"28","author":[{"ORCID":"https:\/\/orcid.org\/0000-0001-8420-9909","authenticated-orcid":false,"given":"Amir","family":"Fathi","sequence":"first","affiliation":[],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Behbood","family":"Mashoufi","sequence":"additional","affiliation":[],"role":[{"vocabulary":"crossref","role":"author"}]},{"ORCID":"https:\/\/orcid.org\/0000-0002-7820-2601","authenticated-orcid":false,"given":"Sarkis","family":"Azizian","sequence":"additional","affiliation":[],"role":[{"vocabulary":"crossref","role":"author"}]}],"member":"263","reference":[{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1109\/ACSSC.2001.986892"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1109\/ISMS.2016.87"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1049\/el.2017.3339"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1109\/MIPRO.2014.6859537"},{"key":"ref14","first-page":"204","article-title":"CMOS implementation of a new high speed, glitch-free 5-2 compressor for fast arithmetic operations","author":"tohidi","year":"2013","journal-title":"Proc Int Conf Mixed Design Integr Circuits Syst (MIXDES'06)"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1109\/ICECS.2010.5724442"},{"key":"ref16","first-page":"1877","article-title":"A new high compression compressor for large multiplier","author":"ma","year":"2008","journal-title":"Proc Int Solid State and Integrated Circuit Technology Conf"},{"key":"ref17","doi-asserted-by":"publisher","DOI":"10.1109\/AICCSA.2007.370924"},{"key":"ref18","doi-asserted-by":"publisher","DOI":"10.7763\/IJMO.2013.V3.314"},{"key":"ref19","first-page":"39","article-title":"High speed and power efficient compression of partial products and vectors","volume":"1","author":"pan","year":"2013","journal-title":"J Algorithms Optim Oct"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/92.988727"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/12.863039"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1587\/transele.E95.C.710"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/4.84935"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1109\/TCSI.2004.835683"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/12.485568"},{"key":"ref2","first-page":"235","article-title":"A 16-bit × 16-bit MAC design using fast 5:2 compressors","author":"kwon","year":"2000","journal-title":"Proc IEEE Int Conf Appl -Specific Syst Archit Processors"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/4.540066"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1109\/ISCAS.2012.6271526"},{"key":"ref20","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2005.853605"}],"container-title":["IEEE Transactions on Very Large Scale Integration (VLSI) Systems"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/92\/9104037\/09068450.pdf?arnumber=9068450","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2022,4,27]],"date-time":"2022-04-27T14:40:14Z","timestamp":1651070414000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/9068450\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2020,6]]},"references-count":20,"journal-issue":{"issue":"6"},"URL":"https:\/\/doi.org\/10.1109\/tvlsi.2020.2983458","relation":{},"ISSN":["1063-8210","1557-9999"],"issn-type":[{"value":"1063-8210","type":"print"},{"value":"1557-9999","type":"electronic"}],"subject":[],"published":{"date-parts":[[2020,6]]}}}