{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,6,2]],"date-time":"2026-06-02T23:58:26Z","timestamp":1780444706625,"version":"3.54.1"},"reference-count":32,"publisher":"Institute of Electrical and Electronics Engineers (IEEE)","issue":"8","license":[{"start":{"date-parts":[[2021,8,1]],"date-time":"2021-08-01T00:00:00Z","timestamp":1627776000000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"},{"start":{"date-parts":[[2021,8,1]],"date-time":"2021-08-01T00:00:00Z","timestamp":1627776000000},"content-version":"am","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"},{"start":{"date-parts":[[2021,8,1]],"date-time":"2021-08-01T00:00:00Z","timestamp":1627776000000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2021,8,1]],"date-time":"2021-08-01T00:00:00Z","timestamp":1627776000000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"funder":[{"DOI":"10.13039\/100000028","name":"Semiconductor Research Corporation","doi-asserted-by":"publisher","award":["2847.001"],"award-info":[{"award-number":["2847.001"]}],"id":[{"id":"10.13039\/100000028","id-type":"DOI","asserted-by":"publisher"}]},{"DOI":"10.13039\/100000001","name":"NSF","doi-asserted-by":"publisher","award":["CNS-1722557"],"award-info":[{"award-number":["CNS-1722557"]}],"id":[{"id":"10.13039\/100000001","id-type":"DOI","asserted-by":"publisher"}]},{"DOI":"10.13039\/100000001","name":"NSF","doi-asserted-by":"publisher","award":["CCF-1718474"],"award-info":[{"award-number":["CCF-1718474"]}],"id":[{"id":"10.13039\/100000001","id-type":"DOI","asserted-by":"publisher"}]},{"DOI":"10.13039\/100000001","name":"NSF","doi-asserted-by":"publisher","award":["DGE-1723687"],"award-info":[{"award-number":["DGE-1723687"]}],"id":[{"id":"10.13039\/100000001","id-type":"DOI","asserted-by":"publisher"}]},{"DOI":"10.13039\/100000001","name":"NSF","doi-asserted-by":"publisher","award":["DGE-1821766"],"award-info":[{"award-number":["DGE-1821766"]}],"id":[{"id":"10.13039\/100000001","id-type":"DOI","asserted-by":"publisher"}]}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["IEEE Trans. VLSI Syst."],"published-print":{"date-parts":[[2021,8]]},"DOI":"10.1109\/tvlsi.2021.3087734","type":"journal-article","created":{"date-parts":[[2021,6,18]],"date-time":"2021-06-18T20:03:41Z","timestamp":1624046621000},"page":"1518-1528","source":"Crossref","is-referenced-by-count":8,"title":["SecNVM: Power Side-Channel Elimination Using On-Chip Capacitors for Highly Secure Emerging NVM"],"prefix":"10.1109","volume":"29","author":[{"ORCID":"https:\/\/orcid.org\/0000-0002-0518-4940","authenticated-orcid":false,"given":"Karthikeyan","family":"Nagarajan","sequence":"first","affiliation":[],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Farid Uddin","family":"Ahmed","sequence":"additional","affiliation":[],"role":[{"vocabulary":"crossref","role":"author"}]},{"ORCID":"https:\/\/orcid.org\/0000-0002-4531-5191","authenticated-orcid":false,"given":"Mohammad Nasim Imtiaz","family":"Khan","sequence":"additional","affiliation":[],"role":[{"vocabulary":"crossref","role":"author"}]},{"ORCID":"https:\/\/orcid.org\/0000-0002-8175-1337","authenticated-orcid":false,"given":"Asmit","family":"De","sequence":"additional","affiliation":[],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Masud H.","family":"Chowdhury","sequence":"additional","affiliation":[],"role":[{"vocabulary":"crossref","role":"author"}]},{"ORCID":"https:\/\/orcid.org\/0000-0001-8753-490X","authenticated-orcid":false,"given":"Swaroop","family":"Ghosh","sequence":"additional","affiliation":[],"role":[{"vocabulary":"crossref","role":"author"}]}],"member":"263","reference":[{"key":"ref32","doi-asserted-by":"publisher","DOI":"10.1109\/TETC.2017.2653813"},{"key":"ref31","doi-asserted-by":"publisher","DOI":"10.1109\/ASPDAC.2016.7428036"},{"key":"ref30","year":"2016","journal-title":"AMD Memory Encryption"},{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1016\/j.comnet.2005.01.010"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1007\/3-540-45418-7_17"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1007\/3-540-44709-1_21"},{"key":"ref13","first-page":"33","article-title":"Generic side-channel countermeasures for reconfigurable devices","author":"g\u00fcneysu","year":"2011","journal-title":"Proc Workshop Cryptographic Hardware Embedded Syst"},{"key":"ref14","first-page":"403","article-title":"A dynamic and differential CMOS logic with signal independent power consumption to withstand differential power analysis on smart cards","author":"tiri","year":"2002","journal-title":"Proc 28th Eur Solid-State Circuits Conf"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1007\/11894063_19"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.1109\/TC.2005.61"},{"key":"ref17","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2006.870913"},{"key":"ref18","first-page":"71","article-title":"Protecting smart cards from passive power analysis with detached power supplies","author":"shamir","year":"2000","journal-title":"Cryptographic Hardware and Embedded Systems"},{"key":"ref19","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2009.2034081"},{"key":"ref28","doi-asserted-by":"publisher","DOI":"10.1145\/2063384.2063454"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1007\/978-1-4939-2163-8_3"},{"key":"ref27","first-page":"434","article-title":"A 0.5 V 4 Mb logic-process compatible embedded resistive RAM (ReRAM) in 65 nm CMOS using low-voltage current-mode sensing scheme with 45 ns random read time","author":"chang","year":"2012","journal-title":"Proc IEEE Int Solid-State Circuits Conf"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/DFT.2016.7684086"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/ICCD.2017.14"},{"key":"ref29","year":"2021","journal-title":"Intel Architecture Memory Encryption Technologies"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1145\/2333660.2333665"},{"key":"ref8","article-title":"Optimal statistical power analysis","author":"brier","year":"2003"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1007\/3-540-48405-1_25"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/TED.2012.2184544"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1007\/3-540-68697-5_9"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/TED.2015.2492421"},{"key":"ref20","doi-asserted-by":"publisher","DOI":"10.1109\/ISCAS.2006.1693907"},{"key":"ref22","doi-asserted-by":"publisher","DOI":"10.1145\/2934583.2934607"},{"key":"ref21","doi-asserted-by":"publisher","DOI":"10.1109\/CICC.2014.6946135"},{"key":"ref24","doi-asserted-by":"publisher","DOI":"10.1109\/HST.2016.7495573"},{"key":"ref23","doi-asserted-by":"publisher","DOI":"10.1109\/ISLPED.2015.7273503"},{"key":"ref26","doi-asserted-by":"publisher","DOI":"10.1145\/2897937.2898087"},{"key":"ref25","doi-asserted-by":"publisher","DOI":"10.1109\/LCA.2018.2863281"}],"container-title":["IEEE Transactions on Very Large Scale Integration (VLSI) Systems"],"original-title":[],"link":[{"URL":"https:\/\/ieeexplore.ieee.org\/ielam\/92\/9502420\/9460781-aam.pdf","content-type":"application\/pdf","content-version":"am","intended-application":"syndication"},{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/92\/9502420\/09460781.pdf?arnumber=9460781","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2022,5,10]],"date-time":"2022-05-10T14:50:33Z","timestamp":1652194233000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/9460781\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2021,8]]},"references-count":32,"journal-issue":{"issue":"8"},"URL":"https:\/\/doi.org\/10.1109\/tvlsi.2021.3087734","relation":{},"ISSN":["1063-8210","1557-9999"],"issn-type":[{"value":"1063-8210","type":"print"},{"value":"1557-9999","type":"electronic"}],"subject":[],"published":{"date-parts":[[2021,8]]}}}