{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,8,29]],"date-time":"2025-08-29T10:25:17Z","timestamp":1756463117764,"version":"3.37.3"},"reference-count":42,"publisher":"Institute of Electrical and Electronics Engineers (IEEE)","issue":"5","license":[{"start":{"date-parts":[[2022,5,1]],"date-time":"2022-05-01T00:00:00Z","timestamp":1651363200000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"},{"start":{"date-parts":[[2022,5,1]],"date-time":"2022-05-01T00:00:00Z","timestamp":1651363200000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2022,5,1]],"date-time":"2022-05-01T00:00:00Z","timestamp":1651363200000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"funder":[{"name":"Windsor-Essex Economic Development Corporation"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["IEEE Trans. VLSI Syst."],"published-print":{"date-parts":[[2022,5]]},"DOI":"10.1109\/tvlsi.2022.3148207","type":"journal-article","created":{"date-parts":[[2022,2,15]],"date-time":"2022-02-15T02:08:07Z","timestamp":1644890887000},"page":"603-614","source":"Crossref","is-referenced-by-count":20,"title":["An Optimized M-Term Karatsuba-Like Binary Polynomial Multiplier for Finite Field Arithmetic"],"prefix":"10.1109","volume":"30","author":[{"ORCID":"https:\/\/orcid.org\/0000-0002-6414-5714","authenticated-orcid":false,"given":"Madhan","family":"Thirumoorthi","sequence":"first","affiliation":[{"name":"Department of Electrical and Computer Engineering, University of Windsor, Windsor, ON, Canada"}]},{"ORCID":"https:\/\/orcid.org\/0000-0002-4116-0778","authenticated-orcid":false,"given":"Moslem","family":"Heidarpur","sequence":"additional","affiliation":[{"name":"Department of Electrical and Computer Engineering, University of Windsor, Windsor, ON, Canada"}]},{"ORCID":"https:\/\/orcid.org\/0000-0001-8512-6427","authenticated-orcid":false,"given":"Mitra","family":"Mirhassani","sequence":"additional","affiliation":[{"name":"Department of Electrical and Computer Engineering, University of Windsor, Windsor, ON, Canada"}]},{"ORCID":"https:\/\/orcid.org\/0000-0003-3903-8789","authenticated-orcid":false,"given":"Mohammed","family":"Khalid","sequence":"additional","affiliation":[{"name":"Department of Electrical and Computer Engineering, University of Windsor, Windsor, ON, Canada"}]}],"member":"263","reference":[{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/SP.2017.65"},{"volume-title":"Creating secure communication channels between processing elements","year":"2017","author":"Vembu","key":"ref2"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/ACCESS.2018.2866626"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1049\/iet-ipr.2018.5288"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/WCCCT.2016.20"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2016.2574620"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/TCSII.2006.889459"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2015.2391274"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2014.2375640"},{"issue":"7","key":"ref10","first-page":"9","article-title":"Data encryption and decryption using RSA algorithm in a network environment","volume":"13","author":"Goshwe","year":"2013","journal-title":"Int. J. Comput. Sci. Netw. Secur. (IJCSNS)"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1007\/978-1-4613-1983-2"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1109\/TC.2013.131"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1007\/s13389-019-00210-w"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1109\/CSCloud\/EdgeCom.2019.00022"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1109\/TC.2004.52"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.1080\/03772063.2014.914699"},{"key":"ref17","doi-asserted-by":"publisher","DOI":"10.1109\/ICSMC.2006.384557"},{"key":"ref18","doi-asserted-by":"publisher","DOI":"10.1109\/SiPS47522.2019.9020592"},{"key":"ref19","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2019.2922999"},{"key":"ref20","doi-asserted-by":"publisher","DOI":"10.1109\/TC.2017.2677426"},{"key":"ref21","doi-asserted-by":"publisher","DOI":"10.1109\/TCSII.2018.2886962"},{"key":"ref22","doi-asserted-by":"publisher","DOI":"10.1109\/TCSII.2019.2932328"},{"key":"ref23","doi-asserted-by":"publisher","DOI":"10.1109\/ACCESS.2020.2989423"},{"key":"ref24","doi-asserted-by":"publisher","DOI":"10.1145\/3431920.3439306"},{"key":"ref25","doi-asserted-by":"publisher","DOI":"10.1016\/j.micpro.2018.07.005"},{"key":"ref26","doi-asserted-by":"publisher","DOI":"10.1109\/ESSCIRC.2010.5619894"},{"key":"ref27","doi-asserted-by":"publisher","DOI":"10.1109\/VLSI.2008.65"},{"key":"ref28","doi-asserted-by":"publisher","DOI":"10.1049\/iet-ifs.2009.0039"},{"key":"ref29","doi-asserted-by":"publisher","DOI":"10.1109\/TCSI.2017.2677962"},{"key":"ref30","first-page":"12","article-title":"FPGA based modified Karatsuba multiplier","volume-title":"Proc. Int. Conf. VLSI Signal Process. (ICVSP)","volume":"10","author":"Samanta"},{"key":"ref31","doi-asserted-by":"publisher","DOI":"10.1109\/ACCESS.2018.2859451"},{"key":"ref32","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2020.3021195"},{"key":"ref33","doi-asserted-by":"publisher","DOI":"10.1007\/978-981-15-5971-6_42"},{"key":"ref34","doi-asserted-by":"publisher","DOI":"10.1109\/VDAT53777.2021.9601001"},{"key":"ref35","doi-asserted-by":"publisher","DOI":"10.1007\/978-981-10-5547-8_53"},{"key":"ref36","doi-asserted-by":"publisher","DOI":"10.1109\/TC.2005.49"},{"key":"ref37","doi-asserted-by":"publisher","DOI":"10.1109\/TC.2018.2874662"},{"key":"ref38","doi-asserted-by":"publisher","DOI":"10.4218\/etrij.17.0116.0770"},{"key":"ref39","doi-asserted-by":"publisher","DOI":"10.1007\/s41635-019-00087-5"},{"key":"ref40","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2009.2020088"},{"issue":"2","key":"ref41","first-page":"161","article-title":"Real time implementation of recursive Karatsuba algorithm using VLSI","volume":"4","author":"Dhanaselvam","year":"2016","journal-title":"Int. J. Innov. Res. Comput. Commun. Eng."},{"key":"ref42","first-page":"359","article-title":"Efficient FPGA-based Karatsuba multipliers for polynomials over $F_{2}$","volume-title":"Proc. Int. Workshop Sel. Areas Cryptogr.","author":"von zur Gathen"}],"container-title":["IEEE Transactions on Very Large Scale Integration (VLSI) Systems"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/92\/9761844\/09714068.pdf?arnumber=9714068","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2024,1,17]],"date-time":"2024-01-17T23:09:01Z","timestamp":1705532941000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/9714068\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2022,5]]},"references-count":42,"journal-issue":{"issue":"5"},"URL":"https:\/\/doi.org\/10.1109\/tvlsi.2022.3148207","relation":{},"ISSN":["1063-8210","1557-9999"],"issn-type":[{"type":"print","value":"1063-8210"},{"type":"electronic","value":"1557-9999"}],"subject":[],"published":{"date-parts":[[2022,5]]}}}