{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,5,2]],"date-time":"2026-05-02T15:14:03Z","timestamp":1777734843177,"version":"3.51.4"},"reference-count":47,"publisher":"Institute of Electrical and Electronics Engineers (IEEE)","issue":"9","license":[{"start":{"date-parts":[[2022,9,1]],"date-time":"2022-09-01T00:00:00Z","timestamp":1661990400000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"},{"start":{"date-parts":[[2022,9,1]],"date-time":"2022-09-01T00:00:00Z","timestamp":1661990400000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2022,9,1]],"date-time":"2022-09-01T00:00:00Z","timestamp":1661990400000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["IEEE Trans. VLSI Syst."],"published-print":{"date-parts":[[2022,9]]},"DOI":"10.1109\/tvlsi.2022.3183793","type":"journal-article","created":{"date-parts":[[2022,6,30]],"date-time":"2022-06-30T19:39:45Z","timestamp":1656617985000},"page":"1219-1229","source":"Crossref","is-referenced-by-count":2,"title":["Pop-Crypt: Identification and Management of <u>Pop<\/u>ular Words for Enhancing Lifetime of En<u>Crypt<\/u>ed Nonvolatile Main Memories"],"prefix":"10.1109","volume":"30","author":[{"ORCID":"https:\/\/orcid.org\/0000-0003-4692-8472","authenticated-orcid":false,"given":"Arijit","family":"Nath","sequence":"first","affiliation":[{"name":"Department of Computer Science and Engineering, IIT Guwahati, Guwahati, Assam, India"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"ORCID":"https:\/\/orcid.org\/0000-0002-9376-7686","authenticated-orcid":false,"given":"Hemangee K.","family":"Kapoor","sequence":"additional","affiliation":[{"name":"Department of Computer Science and Engineering, IIT Guwahati, Guwahati, Assam, India"}],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/GLOCOM.2011.6133953"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/ICDMW.2011.171"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/VTSA.2008.4530774"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/ISPASS.2013.6557176"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1145\/1555754.1555758"},{"key":"ref6","first-page":"52","article-title":"Bi-layered RRAM with unlimited endurance and extremely uniform switching","volume-title":"Symp. VLSI Technol.-Dig. Tech. Papers","author":"Kim"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.2200\/s00381ed1v01y201109cac018"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1109\/ISCAS.2007.377981"},{"key":"ref9","first-page":"347","article-title":"Flip-N-write: A simple deterministic technique to improve PRAM write performance, energy and endurance","volume-title":"Proc. 42nd Annu. IEEE\/ACM Int. Symp. Microarchitecture","author":"Cho"},{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1145\/3323091"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1109\/MM.2015.9"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1145\/2786763.2694387"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1145\/2897937.2898087"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1109\/DAC.2018.8465906"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1145\/1555815.1555759"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.1145\/2629594"},{"key":"ref17","doi-asserted-by":"publisher","DOI":"10.1109\/MM.2005.93"},{"key":"ref18","doi-asserted-by":"publisher","DOI":"10.1109\/MICRO.2018.00043"},{"key":"ref19","doi-asserted-by":"publisher","DOI":"10.1145\/2024716.2024718"},{"key":"ref20","doi-asserted-by":"publisher","DOI":"10.1109\/ISVLSI.2012.82"},{"key":"ref21","doi-asserted-by":"publisher","DOI":"10.1145\/1454115.1454128"},{"key":"ref22","doi-asserted-by":"publisher","DOI":"10.1145\/1186736.1186737"},{"key":"ref23","doi-asserted-by":"publisher","DOI":"10.1109\/ISCA.2005.30"},{"key":"ref24","doi-asserted-by":"publisher","DOI":"10.1109\/4.509850"},{"key":"ref25","doi-asserted-by":"publisher","DOI":"10.1109\/HPCA.2013.6522322"},{"key":"ref26","doi-asserted-by":"publisher","DOI":"10.1145\/1816038.1815980"},{"key":"ref27","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2014.2384039"},{"key":"ref28","doi-asserted-by":"publisher","DOI":"10.3403\/02291248u"},{"key":"ref29","first-page":"1","article-title":"Adaptive granularity encoding for energy-efficient non-volatile main memory","volume-title":"Proc. 56th Annu. Design Autom. Conf.","author":"Xu"},{"key":"ref30","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2019.2962127"},{"key":"ref31","doi-asserted-by":"publisher","DOI":"10.1109\/DAC18072.2020.9218683"},{"key":"ref32","doi-asserted-by":"publisher","DOI":"10.1145\/1669112.1669117"},{"key":"ref33","doi-asserted-by":"publisher","DOI":"10.1145\/3404397.3404405"},{"key":"ref34","doi-asserted-by":"publisher","DOI":"10.1109\/ASPDAC.2017.7858318"},{"key":"ref35","doi-asserted-by":"publisher","DOI":"10.1109\/TC.2016.2557326"},{"key":"ref36","doi-asserted-by":"publisher","DOI":"10.1145\/2000064.2000086"},{"key":"ref37","doi-asserted-by":"publisher","DOI":"10.1109\/DSN.2010.5544298"},{"key":"ref38","doi-asserted-by":"publisher","DOI":"10.1109\/TETC.2017.2787622"},{"key":"ref39","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2018.2865133"},{"key":"ref40","doi-asserted-by":"publisher","DOI":"10.1109\/ICCAD51958.2021.9643529"},{"key":"ref41","doi-asserted-by":"publisher","DOI":"10.1145\/2954679.2872377"},{"key":"ref42","volume-title":"Understanding the Linux Kernel: From I\/O Ports to Process Management","author":"Bovet","year":"2005"},{"key":"ref43","volume-title":"MAC OS X Internals: A Systems Approach (Paperback)","author":"Singh","year":"2006"},{"key":"ref44","doi-asserted-by":"publisher","DOI":"10.23919\/DATE.2017.7927117"},{"key":"ref45","doi-asserted-by":"publisher","DOI":"10.1145\/2808704.2754969"},{"key":"ref46","doi-asserted-by":"publisher","DOI":"10.1109\/TC.2016.2642180"},{"key":"ref47","doi-asserted-by":"publisher","DOI":"10.1109\/DAC.2018.8465917"}],"container-title":["IEEE Transactions on Very Large Scale Integration (VLSI) Systems"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/92\/9874436\/09812463.pdf?arnumber=9812463","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2024,2,1]],"date-time":"2024-02-01T03:53:28Z","timestamp":1706759608000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/9812463\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2022,9]]},"references-count":47,"journal-issue":{"issue":"9"},"URL":"https:\/\/doi.org\/10.1109\/tvlsi.2022.3183793","relation":{},"ISSN":["1063-8210","1557-9999"],"issn-type":[{"value":"1063-8210","type":"print"},{"value":"1557-9999","type":"electronic"}],"subject":[],"published":{"date-parts":[[2022,9]]}}}