{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,6,19]],"date-time":"2026-06-19T16:37:20Z","timestamp":1781887040921,"version":"3.54.5"},"reference-count":109,"publisher":"Institute of Electrical and Electronics Engineers (IEEE)","issue":"11","license":[{"start":{"date-parts":[[2022,11,1]],"date-time":"2022-11-01T00:00:00Z","timestamp":1667260800000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"},{"start":{"date-parts":[[2022,11,1]],"date-time":"2022-11-01T00:00:00Z","timestamp":1667260800000},"content-version":"am","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"},{"start":{"date-parts":[[2022,11,1]],"date-time":"2022-11-01T00:00:00Z","timestamp":1667260800000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2022,11,1]],"date-time":"2022-11-01T00:00:00Z","timestamp":1667260800000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["IEEE Trans. VLSI Syst."],"published-print":{"date-parts":[[2022,11]]},"DOI":"10.1109\/tvlsi.2022.3203583","type":"journal-article","created":{"date-parts":[[2022,9,21]],"date-time":"2022-09-21T19:30:26Z","timestamp":1663788626000},"page":"1615-1630","source":"Crossref","is-referenced-by-count":45,"title":["Compute-in-Memory Technologies and Architectures for Deep Learning Workloads"],"prefix":"10.1109","volume":"30","author":[{"ORCID":"https:\/\/orcid.org\/0000-0002-4452-6464","authenticated-orcid":false,"given":"Mustafa","family":"Ali","sequence":"first","affiliation":[{"name":"School of Electrical and Computer Engineering, Purdue University, West Lafayette, IN, USA"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"ORCID":"https:\/\/orcid.org\/0000-0002-6864-7738","authenticated-orcid":false,"given":"Sourjya","family":"Roy","sequence":"additional","affiliation":[{"name":"School of Electrical and Computer Engineering, Purdue University, West Lafayette, IN, USA"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Utkarsh","family":"Saxena","sequence":"additional","affiliation":[{"name":"School of Electrical and Computer Engineering, Purdue University, West Lafayette, IN, USA"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"ORCID":"https:\/\/orcid.org\/0000-0001-8307-5785","authenticated-orcid":false,"given":"Tanvi","family":"Sharma","sequence":"additional","affiliation":[{"name":"School of Electrical and Computer Engineering, Purdue University, West Lafayette, IN, USA"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Anand","family":"Raghunathan","sequence":"additional","affiliation":[{"name":"School of Electrical and Computer Engineering, Purdue University, West Lafayette, IN, USA"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"ORCID":"https:\/\/orcid.org\/0000-0002-0735-9695","authenticated-orcid":false,"given":"Kaushik","family":"Roy","sequence":"additional","affiliation":[{"name":"School of Electrical and Computer Engineering, Purdue University, West Lafayette, IN, USA"}],"role":[{"vocabulary":"crossref","role":"author"}]}],"member":"263","reference":[{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/cvpr.2016.90"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1145\/3079856.3080246"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/isca.2016.40"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/HCS49909.2020.9220622"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/MSSC.2019.2922889"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/JPROC.2020.3003007"},{"key":"ref7","article-title":"X-CHANGR: Changing memristive crossbar mapping for mitigating line-resistance induced accuracy degradation in deep neural networks","author":"Agrawal","year":"2019","journal-title":"arXiv:1907.00285"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1109\/TCSI.2019.2945617"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1109\/TCSI.2019.2907488"},{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1109\/LSSC.2021.3093354"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1145\/3007787.3001139"},{"key":"ref12","first-page":"273","article-title":"Ambit: In-memory accelerator for bulk bitwise operations using commodity DRAM technology","volume-title":"Proc. 50th Annu. IEEE\/ACM Int. Symp. Microarchitecture (MICRO)","author":"Seshadri"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1109\/MICRO50266.2020.00040"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1109\/ISCA.2016.41"},{"key":"ref15","first-page":"185","article-title":"RowClone: Fast and energy-efficient in-DRAM bulk data copy and initialization","volume-title":"Proc. 46th Annu. IEEE\/ACM Int. Symp. Microarchitecture (MICRO)","author":"Seshadri"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.1109\/ISCA45697.2020.00070"},{"key":"ref17","doi-asserted-by":"publisher","DOI":"10.1109\/dac18072.2020.9218688"},{"key":"ref18","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2012.2217514"},{"key":"ref19","doi-asserted-by":"publisher","DOI":"10.1109\/LED.2013.2279137"},{"key":"ref20","doi-asserted-by":"publisher","DOI":"10.1109\/TC.2018.2867048"},{"key":"ref21","doi-asserted-by":"publisher","DOI":"10.1145\/3297858.3304049"},{"key":"ref22","doi-asserted-by":"publisher","DOI":"10.1145\/3400302.3416344"},{"key":"ref23","doi-asserted-by":"publisher","DOI":"10.1109\/ISCA.2018.00040"},{"key":"ref24","doi-asserted-by":"publisher","DOI":"10.1145\/3400302.3415640"},{"key":"ref25","doi-asserted-by":"publisher","DOI":"10.1145\/3093337.3037702"},{"key":"ref26","doi-asserted-by":"publisher","DOI":"10.1109\/HCS52781.2021.9567191"},{"key":"ref27","doi-asserted-by":"publisher","DOI":"10.1109\/JETCAS.2021.3127517"},{"key":"ref28","doi-asserted-by":"publisher","DOI":"10.1145\/3065386"},{"key":"ref29","doi-asserted-by":"publisher","DOI":"10.1007\/978-3-319-24574-4_28"},{"key":"ref30","doi-asserted-by":"publisher","DOI":"10.1109\/CVPR.2016.91"},{"key":"ref31","article-title":"Understanding LSTM\u2014A tutorial into long short-term memory recurrent neural networks","author":"Staudemeyer","year":"2019","journal-title":"arXiv:1909.09586"},{"key":"ref32","volume-title":"Very deep convolutional networks for large-scale image recognition","author":"Simonyan","year":"2014"},{"key":"ref33","article-title":"A survey of quantization methods for efficient neural network inference","author":"Gholami","year":"2021","journal-title":"arXiv:2103.13630"},{"key":"ref34","first-page":"1","article-title":"Training deep neural networks with 8-bit floating point numbers","volume-title":"Proc. Adv. Neural Inf. Process. Syst.","author":"Wang"},{"key":"ref35","volume-title":"DoReFa-Net: Training low bitwidth convolutional neural networks with low bitwidth gradients","author":"Zhou","year":"2016"},{"key":"ref36","doi-asserted-by":"publisher","DOI":"10.1007\/978-3-319-46493-0_32"},{"key":"ref37","doi-asserted-by":"publisher","DOI":"10.1007\/978-3-030-01267-0_44"},{"key":"ref38","volume-title":"Unlocking the Promise of Approximate Computing for on-Chip AI Acceleration","author":"Fleischer","year":"2018"},{"key":"ref39","first-page":"1","article-title":"Attention is all you need","volume-title":"Proc. Adv. Neural Inf. Process. Syst.","volume":"30","author":"Vaswani"},{"key":"ref40","doi-asserted-by":"publisher","DOI":"10.1109\/DAC18074.2021.9586134"},{"key":"ref41","article-title":"Data movement is all you need: A case study of transformer networks","author":"Ivanov","year":"2020","journal-title":"arXiv:2007.00072"},{"key":"ref42","doi-asserted-by":"publisher","DOI":"10.1145\/3445814.3446763"},{"key":"ref43","doi-asserted-by":"publisher","DOI":"10.1145\/3352460.3358284"},{"key":"ref44","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2013.2259038"},{"key":"ref45","doi-asserted-by":"publisher","DOI":"10.1109\/ijcnn.2015.7280696"},{"key":"ref46","doi-asserted-by":"publisher","DOI":"10.1109\/ICASSP40776.2020.9053856"},{"key":"ref47","doi-asserted-by":"publisher","DOI":"10.1609\/aaai.v36i7.20771"},{"key":"ref48","doi-asserted-by":"publisher","DOI":"10.1017\/cbo9780511815706"},{"key":"ref49","doi-asserted-by":"publisher","DOI":"10.3389\/fnins.2020.00119"},{"key":"ref50","doi-asserted-by":"publisher","DOI":"10.1109\/CVPR42600.2020.01357"},{"key":"ref51","article-title":"DIET-SNN: Direct input encoding with leakage and threshold optimization in deep spiking neural networks","author":"Rathi","year":"2020","journal-title":"arXiv:2008.03658"},{"key":"ref52","doi-asserted-by":"publisher","DOI":"10.1109\/TCSI.2018.2848999"},{"key":"ref53","doi-asserted-by":"publisher","DOI":"10.1109\/LSSC.2021.3092727"},{"key":"ref54","doi-asserted-by":"publisher","DOI":"10.1109\/JPROC.2020.3034117"},{"key":"ref55","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2019.2929245"},{"key":"ref56","doi-asserted-by":"publisher","DOI":"10.1109\/jssc.2019.2952773"},{"key":"ref57","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC19947.2020.9062995"},{"key":"ref58","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC19947.2020.9062958"},{"key":"ref59","volume-title":"ADC Performance Survey 1997\u20132022","author":"Murmann","year":"2021"},{"key":"ref60","doi-asserted-by":"publisher","DOI":"10.23919\/DATE54114.2022.9774573"},{"key":"ref61","doi-asserted-by":"publisher","DOI":"10.1145\/3218603.3218605"},{"key":"ref62","doi-asserted-by":"publisher","DOI":"10.23919\/DATE51398.2021.9474056"},{"key":"ref63","doi-asserted-by":"publisher","DOI":"10.1109\/DAC18072.2020.9218657"},{"key":"ref64","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2020.2987714"},{"key":"ref65","article-title":"Hardware\u2013software codesign for efficient machine learning using in-memory computing","author":"Ankit","year":"2020"},{"key":"ref66","doi-asserted-by":"publisher","DOI":"10.1109\/TC.2020.2972528"},{"key":"ref67","doi-asserted-by":"publisher","DOI":"10.1109\/AICAS51828.2021.9458576"},{"key":"ref68","doi-asserted-by":"publisher","DOI":"10.1016\/j.sse.2016.07.006"},{"key":"ref69","doi-asserted-by":"publisher","DOI":"10.1109\/TNNLS.2017.2778940"},{"key":"ref70","doi-asserted-by":"publisher","DOI":"10.1109\/JPROC.2010.2070050"},{"key":"ref71","doi-asserted-by":"publisher","DOI":"10.1109\/JPROC.2012.2190369"},{"key":"ref72","doi-asserted-by":"publisher","DOI":"10.1109\/JPROC.2016.2521712"},{"key":"ref73","doi-asserted-by":"publisher","DOI":"10.1109\/TCSI.2021.3072200"},{"key":"ref74","doi-asserted-by":"publisher","DOI":"10.1145\/3007787.3001140"},{"key":"ref75","doi-asserted-by":"publisher","DOI":"10.1038\/s41928-017-0002-z"},{"key":"ref76","doi-asserted-by":"publisher","DOI":"10.1109\/iedm.2015.7409716"},{"key":"ref77","doi-asserted-by":"publisher","DOI":"10.1063\/1.5042413"},{"key":"ref78","doi-asserted-by":"publisher","DOI":"10.1088\/0022-3727\/46\/7\/074001"},{"key":"ref79","doi-asserted-by":"publisher","DOI":"10.1109\/VLSITechnology18217.2020.9265099"},{"key":"ref80","doi-asserted-by":"publisher","DOI":"10.1109\/ISLPED52811.2021.9502492"},{"key":"ref81","doi-asserted-by":"publisher","DOI":"10.1038\/s41928-020-0411-2"},{"key":"ref82","doi-asserted-by":"publisher","DOI":"10.1109\/IEDM.2017.8268338"},{"key":"ref83","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2018.2789723"},{"key":"ref84","doi-asserted-by":"publisher","DOI":"10.1109\/AICAS51828.2021.9458433"},{"key":"ref85","doi-asserted-by":"publisher","DOI":"10.1109\/tc.2020.2998456"},{"key":"ref86","doi-asserted-by":"publisher","DOI":"10.1109\/HPCA.2017.55"},{"key":"ref87","doi-asserted-by":"publisher","DOI":"10.1109\/TC.2021.3082003"},{"key":"ref88","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2021.3098671"},{"key":"ref89","doi-asserted-by":"publisher","DOI":"10.1109\/IEDM19574.2021.9720625"},{"key":"ref90","doi-asserted-by":"publisher","DOI":"10.1109\/AICAS51828.2021.9458433"},{"key":"ref91","doi-asserted-by":"publisher","DOI":"10.1109\/ICCAD.2017.8203823"},{"key":"ref92","doi-asserted-by":"publisher","DOI":"10.1109\/DAC18072.2020.9218737"},{"key":"ref93","doi-asserted-by":"publisher","DOI":"10.1109\/TETCI.2018.2829919"},{"key":"ref94","article-title":"Training large-scale ANNs on simulated resistive crossbar arrays","author":"Rasch","year":"2019","journal-title":"arXiv:1906.02698"},{"key":"ref95","doi-asserted-by":"publisher","DOI":"10.1145\/3123939.3123977"},{"key":"ref96","doi-asserted-by":"publisher","DOI":"10.1109\/DAC.2018.8465866"},{"key":"ref97","doi-asserted-by":"publisher","DOI":"10.1109\/HPCA47549.2020.00033"},{"key":"ref98","doi-asserted-by":"publisher","DOI":"10.1145\/3445814.3446749"},{"key":"ref99","doi-asserted-by":"publisher","DOI":"10.1109\/vlsit.2012.6242474"},{"key":"ref100","doi-asserted-by":"publisher","DOI":"10.1109\/mm.2018.022071134"},{"key":"ref101","doi-asserted-by":"publisher","DOI":"10.1109\/dac18072.2020.9218688"},{"key":"ref102","doi-asserted-by":"publisher","DOI":"10.1145\/3362035"},{"key":"ref103","doi-asserted-by":"publisher","DOI":"10.1145\/3362035"},{"key":"ref104","article-title":"X-CHANGR: Changing memristive crossbar mapping for mitigating line-resistance induced accuracy degradation in deep neural networks","author":"Agrawal","year":"2019","journal-title":"arXiv:1907.00285"},{"key":"ref105","doi-asserted-by":"publisher","DOI":"10.1109\/ICCAD.2014.7001330"},{"key":"ref106","doi-asserted-by":"publisher","DOI":"10.1109\/JXCDC.2020.2992306"},{"key":"ref107","doi-asserted-by":"publisher","DOI":"10.1109\/A-SSCC53895.2021.9634742"},{"key":"ref108","doi-asserted-by":"publisher","DOI":"10.1038\/s41467-020-16108-9"},{"key":"ref109","doi-asserted-by":"publisher","DOI":"10.1016\/s0167-9260(99)00006-1"}],"container-title":["IEEE Transactions on Very Large Scale Integration (VLSI) Systems"],"original-title":[],"link":[{"URL":"https:\/\/ieeexplore.ieee.org\/ielam\/92\/9925603\/9899381-aam.pdf","content-type":"application\/pdf","content-version":"am","intended-application":"syndication"},{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/92\/9925603\/09899381.pdf?arnumber=9899381","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2024,1,24]],"date-time":"2024-01-24T01:54:44Z","timestamp":1706061284000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/9899381\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2022,11]]},"references-count":109,"journal-issue":{"issue":"11"},"URL":"https:\/\/doi.org\/10.1109\/tvlsi.2022.3203583","relation":{},"ISSN":["1063-8210","1557-9999"],"issn-type":[{"value":"1063-8210","type":"print"},{"value":"1557-9999","type":"electronic"}],"subject":[],"published":{"date-parts":[[2022,11]]}}}