{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,7,2]],"date-time":"2026-07-02T04:57:49Z","timestamp":1782968269288,"version":"3.54.5"},"reference-count":39,"publisher":"Institute of Electrical and Electronics Engineers (IEEE)","issue":"10","license":[{"start":{"date-parts":[[2023,10,1]],"date-time":"2023-10-01T00:00:00Z","timestamp":1696118400000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"},{"start":{"date-parts":[[2023,10,1]],"date-time":"2023-10-01T00:00:00Z","timestamp":1696118400000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2023,10,1]],"date-time":"2023-10-01T00:00:00Z","timestamp":1696118400000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"funder":[{"DOI":"10.13039\/501100001809","name":"National Natural Science Foundation of China","doi-asserted-by":"publisher","award":["62176206"],"award-info":[{"award-number":["62176206"]}],"id":[{"id":"10.13039\/501100001809","id-type":"DOI","asserted-by":"publisher"}]},{"DOI":"10.13039\/501100004750","name":"Aeronautical Science Foundation of China","doi-asserted-by":"publisher","award":["2020Z066070001"],"award-info":[{"award-number":["2020Z066070001"]}],"id":[{"id":"10.13039\/501100004750","id-type":"DOI","asserted-by":"publisher"}]},{"name":"Key-Area Research and Development Program of Guangdong Province","award":["2019B010154002"],"award-info":[{"award-number":["2019B010154002"]}]}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["IEEE Trans. VLSI Syst."],"published-print":{"date-parts":[[2023,10]]},"DOI":"10.1109\/tvlsi.2023.3298943","type":"journal-article","created":{"date-parts":[[2023,8,8]],"date-time":"2023-08-08T17:49:05Z","timestamp":1691516945000},"page":"1472-1485","source":"Crossref","is-referenced-by-count":26,"title":["A High-Throughput and Flexible Architecture Based on a Reconfigurable Mixed-Radix FFT With Twiddle Factor Compression and Conflict-Free Access"],"prefix":"10.1109","volume":"31","author":[{"ORCID":"https:\/\/orcid.org\/0000-0002-8221-7670","authenticated-orcid":false,"given":"Chen","family":"Yang","sequence":"first","affiliation":[{"name":"School of Microelectronics, Xi&#x2019;an Jiaotong University, Xi&#x2019;an, China"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Junfeng","family":"Wu","sequence":"additional","affiliation":[{"name":"School of Microelectronics, Xi&#x2019;an Jiaotong University, Xi&#x2019;an, China"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Siwei","family":"Xiang","sequence":"additional","affiliation":[{"name":"School of Microelectronics, Xi&#x2019;an Jiaotong University, Xi&#x2019;an, China"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Liyan","family":"Liang","sequence":"additional","affiliation":[{"name":"School of Microelectronics, Xi&#x2019;an Jiaotong University, Xi&#x2019;an, China"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"ORCID":"https:\/\/orcid.org\/0000-0003-4002-9281","authenticated-orcid":false,"given":"Li","family":"Geng","sequence":"additional","affiliation":[{"name":"School of Microelectronics, Xi&#x2019;an Jiaotong University, Xi&#x2019;an, China"}],"role":[{"vocabulary":"crossref","role":"author"}]}],"member":"263","reference":[{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1109\/SiPS.2017.8110007"},{"key":"ref35","doi-asserted-by":"publisher","DOI":"10.1049\/el:20020117"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2020.2992021"},{"key":"ref34","doi-asserted-by":"publisher","DOI":"10.1109\/ICECS53924.2021.9665459"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1109\/IMCEC46724.2019.8984148"},{"key":"ref37","doi-asserted-by":"publisher","DOI":"10.1109\/TCSII.2022.3163280"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1049\/el.2012.0577"},{"key":"ref36","doi-asserted-by":"publisher","DOI":"10.1109\/TCSII.2018.2828648"},{"key":"ref31","doi-asserted-by":"publisher","DOI":"10.1109\/GCCE.2017.8229254"},{"key":"ref30","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2014.2361209"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1109\/TCSI.2018.2860942"},{"key":"ref33","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2005.852007"},{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1109\/TCSI.2017.2725338"},{"key":"ref32","doi-asserted-by":"publisher","DOI":"10.1145\/1498765.1498785"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2018.2879675"},{"key":"ref1","article-title":"FFT implementation on FPGA for 5G networks","author":"vasilica","year":"2019"},{"key":"ref17","doi-asserted-by":"publisher","DOI":"10.1109\/ICOEI.2019.8862628"},{"key":"ref39","doi-asserted-by":"publisher","DOI":"10.1109\/TCSII.2021.3064238"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.1007\/s11265-017-1326-7"},{"key":"ref38","doi-asserted-by":"publisher","DOI":"10.1109\/ICSAI48974.2019.9010464"},{"key":"ref19","doi-asserted-by":"publisher","DOI":"10.1109\/ICPCSI.2017.8392133"},{"key":"ref18","doi-asserted-by":"publisher","DOI":"10.1109\/TASC.2021.3059984"},{"key":"ref24","doi-asserted-by":"publisher","DOI":"10.1109\/TCSI.2011.2180430"},{"key":"ref23","doi-asserted-by":"publisher","DOI":"10.4316\/AECE.2017.01005"},{"key":"ref26","doi-asserted-by":"publisher","DOI":"10.1109\/ICGCCEE.2014.6922202"},{"key":"ref25","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2015.2504391"},{"key":"ref20","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2014.2347399"},{"key":"ref22","doi-asserted-by":"publisher","DOI":"10.1007\/s00034-016-0435-z"},{"key":"ref21","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2015.2402207"},{"key":"ref28","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2017.2666820"},{"key":"ref27","doi-asserted-by":"publisher","DOI":"10.1109\/TSP.2012.2214218"},{"key":"ref29","doi-asserted-by":"publisher","DOI":"10.1109\/MWSCAS.2013.6674821"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2014.2350017"},{"key":"ref7","first-page":"14","article-title":"Energy-efficient 1282~048\/1536-point FFT processor with resource block mapping for 3GPP-LTE system","author":"peng","year":"2010","journal-title":"Proc ICGCS"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1109\/TCSI.2017.2654451"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2016.2542583"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2017.2710479"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/ICIEV.2013.6572680"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/ISCAS.2016.7539011"}],"container-title":["IEEE Transactions on Very Large Scale Integration (VLSI) Systems"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/92\/10261320\/10210710.pdf?arnumber=10210710","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2023,11,6]],"date-time":"2023-11-06T20:04:38Z","timestamp":1699301078000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/10210710\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2023,10]]},"references-count":39,"journal-issue":{"issue":"10"},"URL":"https:\/\/doi.org\/10.1109\/tvlsi.2023.3298943","relation":{},"ISSN":["1063-8210","1557-9999"],"issn-type":[{"value":"1063-8210","type":"print"},{"value":"1557-9999","type":"electronic"}],"subject":[],"published":{"date-parts":[[2023,10]]}}}