{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,7,2]],"date-time":"2026-07-02T05:36:44Z","timestamp":1782970604841,"version":"3.54.5"},"reference-count":48,"publisher":"Institute of Electrical and Electronics Engineers (IEEE)","issue":"6","license":[{"start":{"date-parts":[[2024,6,1]],"date-time":"2024-06-01T00:00:00Z","timestamp":1717200000000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"},{"start":{"date-parts":[[2024,6,1]],"date-time":"2024-06-01T00:00:00Z","timestamp":1717200000000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2024,6,1]],"date-time":"2024-06-01T00:00:00Z","timestamp":1717200000000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"funder":[{"name":"National Leading Talent Program"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["IEEE Trans. VLSI Syst."],"published-print":{"date-parts":[[2024,6]]},"DOI":"10.1109\/tvlsi.2024.3382254","type":"journal-article","created":{"date-parts":[[2024,4,2]],"date-time":"2024-04-02T19:06:04Z","timestamp":1712084764000},"page":"977-990","source":"Crossref","is-referenced-by-count":6,"title":["Analysis and Calibration of Bit Weights in SAR and Pipelined SAR ADCs Based on Code Distribution"],"prefix":"10.1109","volume":"32","author":[{"ORCID":"https:\/\/orcid.org\/0000-0002-3566-1138","authenticated-orcid":false,"given":"Bingbing","family":"Ma","sequence":"first","affiliation":[{"name":"State Key Laboratory of Integrated Chips and Systems, Fudan University, Shanghai, China"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"ORCID":"https:\/\/orcid.org\/0000-0001-9177-4551","authenticated-orcid":false,"given":"Wei","family":"Li","sequence":"additional","affiliation":[{"name":"State Key Laboratory of Integrated Chips and Systems, Fudan University, Shanghai, China"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"ORCID":"https:\/\/orcid.org\/0000-0003-1852-4112","authenticated-orcid":false,"given":"Hongtao","family":"Xu","sequence":"additional","affiliation":[{"name":"State Key Laboratory of Integrated Chips and Systems, Fudan University, Shanghai, China"}],"role":[{"vocabulary":"crossref","role":"author"}]}],"member":"263","reference":[{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.1975.1050629"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2014.2384025"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/TCSI.2004.832755"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/isscc.1981.1156178"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.1984.1052231"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2011.2163556"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1049\/el.2015.3164"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2015.2442258"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1109\/TCSI.2020.2998473"},{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2019.2950188"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1109\/TCSII.2020.2988646"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1049\/el:20000501"},{"key":"ref13","first-page":"C268","article-title":"A 2.1 mW 11b 410 MS\/s dynamic pipelined SAR ADC with background calibration in 28nm digital CMOS","volume-title":"Proc. Symp. VLSI Circuits","author":"Verbruggen"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1109\/4.261994"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1109\/TCSI.2003.821306"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2004.836230"},{"key":"ref17","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2004.842866"},{"key":"ref18","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2007.914260"},{"key":"ref19","doi-asserted-by":"publisher","DOI":"10.1109\/TCSI.2008.925373"},{"key":"ref20","doi-asserted-by":"publisher","DOI":"10.1109\/tcsi.2017.2679748"},{"key":"ref21","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2003.819167"},{"key":"ref22","doi-asserted-by":"publisher","DOI":"10.1109\/TCSI.2004.839534"},{"key":"ref23","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2009.2014702"},{"key":"ref24","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2009.2032637"},{"key":"ref25","doi-asserted-by":"publisher","DOI":"10.1109\/TCSI.2011.2169854"},{"key":"ref26","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2021.3133829"},{"key":"ref27","doi-asserted-by":"publisher","DOI":"10.1109\/PROC.1983.12701"},{"key":"ref28","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.1985.1052447"},{"key":"ref29","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2015.2463094"},{"key":"ref30","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2020.3015863"},{"key":"ref31","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC42615.2023.10067703"},{"key":"ref32","doi-asserted-by":"publisher","DOI":"10.1109\/ISCAS.2005.1464555"},{"key":"ref33","doi-asserted-by":"publisher","DOI":"10.1049\/el.2010.0706"},{"key":"ref34","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2010.2042254"},{"key":"ref35","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2010.2043893"},{"key":"ref36","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC.2014.6757397"},{"key":"ref37","doi-asserted-by":"publisher","DOI":"10.1109\/TEC.1959.5222693"},{"key":"ref38","doi-asserted-by":"publisher","DOI":"10.1109\/19.293454"},{"key":"ref39","doi-asserted-by":"publisher","DOI":"10.1109\/TCSI.2018.2859837"},{"key":"ref40","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2023.3290119"},{"key":"ref41","doi-asserted-by":"publisher","DOI":"10.1109\/TCSI.2016.2594256"},{"key":"ref42","doi-asserted-by":"publisher","DOI":"10.1109\/4.50307"},{"key":"ref43","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2006.875291"},{"key":"ref44","doi-asserted-by":"publisher","DOI":"10.1109\/MSSC.2012.2192190"},{"key":"ref45","doi-asserted-by":"publisher","DOI":"10.1109\/TCSI.2022.3199438"},{"key":"ref46","doi-asserted-by":"publisher","DOI":"10.1109\/TCSI.2010.2055353"},{"key":"ref47","doi-asserted-by":"publisher","DOI":"10.1109\/VLSIC.2016.7573536"},{"key":"ref48","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.1984.1052232"}],"container-title":["IEEE Transactions on Very Large Scale Integration (VLSI) Systems"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/92\/10536717\/10489909.pdf?arnumber=10489909","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2024,9,25]],"date-time":"2024-09-25T19:33:19Z","timestamp":1727292799000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/10489909\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2024,6]]},"references-count":48,"journal-issue":{"issue":"6"},"URL":"https:\/\/doi.org\/10.1109\/tvlsi.2024.3382254","relation":{},"ISSN":["1063-8210","1557-9999"],"issn-type":[{"value":"1063-8210","type":"print"},{"value":"1557-9999","type":"electronic"}],"subject":[],"published":{"date-parts":[[2024,6]]}}}