{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,10,31]],"date-time":"2025-10-31T08:06:39Z","timestamp":1761897999254,"version":"3.37.3"},"reference-count":7,"publisher":"Institute of Electrical and Electronics Engineers (IEEE)","issue":"8","license":[{"start":{"date-parts":[[2024,8,1]],"date-time":"2024-08-01T00:00:00Z","timestamp":1722470400000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"},{"start":{"date-parts":[[2024,8,1]],"date-time":"2024-08-01T00:00:00Z","timestamp":1722470400000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2024,8,1]],"date-time":"2024-08-01T00:00:00Z","timestamp":1722470400000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"funder":[{"DOI":"10.13039\/100007183","name":"Academic Senate Faculty Research Grant from the University of California Santa Barbara","doi-asserted-by":"publisher","id":[{"id":"10.13039\/100007183","id-type":"DOI","asserted-by":"publisher"}]}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["IEEE Trans. VLSI Syst."],"published-print":{"date-parts":[[2024,8]]},"DOI":"10.1109\/tvlsi.2024.3392617","type":"journal-article","created":{"date-parts":[[2024,4,29]],"date-time":"2024-04-29T17:57:31Z","timestamp":1714413451000},"page":"1554-1558","source":"Crossref","is-referenced-by-count":2,"title":["Symmetric and Multiphase-Interleaved Ladder Bucks for DC Capacitors Elimination"],"prefix":"10.1109","volume":"32","author":[{"ORCID":"https:\/\/orcid.org\/0000-0002-5652-5098","authenticated-orcid":false,"given":"Loai G.","family":"Salem","sequence":"first","affiliation":[{"name":"Department of Electrical and Computer Engineering, University of California at Santa Barbara, Santa Barbara, CA, USA"}],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"volume-title":"Switched Capacitor Integrated Buck (SCIB) Power Converter Design","year":"2023","key":"ref1"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/TPEL.2017.2690324"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/isscc.2019.8662475"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC42615.2023.10067463"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.21236\/ADA538398"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/tpel.2023.3259949"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/TPEL.2019.2951116"}],"container-title":["IEEE Transactions on Very Large Scale Integration (VLSI) Systems"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/92\/10609530\/10510403.pdf?arnumber=10510403","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2024,7,26]],"date-time":"2024-07-26T05:06:34Z","timestamp":1721970394000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/10510403\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2024,8]]},"references-count":7,"journal-issue":{"issue":"8"},"URL":"https:\/\/doi.org\/10.1109\/tvlsi.2024.3392617","relation":{},"ISSN":["1063-8210","1557-9999"],"issn-type":[{"type":"print","value":"1063-8210"},{"type":"electronic","value":"1557-9999"}],"subject":[],"published":{"date-parts":[[2024,8]]}}}