{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,6,5]],"date-time":"2026-06-05T15:57:54Z","timestamp":1780675074838,"version":"3.54.1"},"reference-count":46,"publisher":"Institute of Electrical and Electronics Engineers (IEEE)","issue":"2","license":[{"start":{"date-parts":[[2025,2,1]],"date-time":"2025-02-01T00:00:00Z","timestamp":1738368000000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"},{"start":{"date-parts":[[2025,2,1]],"date-time":"2025-02-01T00:00:00Z","timestamp":1738368000000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2025,2,1]],"date-time":"2025-02-01T00:00:00Z","timestamp":1738368000000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["IEEE Trans. VLSI Syst."],"published-print":{"date-parts":[[2025,2]]},"DOI":"10.1109\/tvlsi.2024.3467148","type":"journal-article","created":{"date-parts":[[2024,10,16]],"date-time":"2024-10-16T18:11:14Z","timestamp":1729102274000},"page":"346-357","source":"Crossref","is-referenced-by-count":6,"title":["Bandwidth-Latency-Thermal Co-Optimization of Interconnect-Dominated Many-Core 3D-IC"],"prefix":"10.1109","volume":"33","author":[{"ORCID":"https:\/\/orcid.org\/0009-0007-2998-9827","authenticated-orcid":false,"given":"Sudipta","family":"Das","sequence":"first","affiliation":[{"name":"Imec, Leuven, Belgium"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"ORCID":"https:\/\/orcid.org\/0000-0002-5772-6377","authenticated-orcid":false,"given":"Samuel","family":"Riedel","sequence":"additional","affiliation":[{"name":"ETH Zurich, Zürich, Switzerland"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"ORCID":"https:\/\/orcid.org\/0009-0006-8202-2159","authenticated-orcid":false,"given":"Mohamed","family":"Naeim","sequence":"additional","affiliation":[{"name":"Imec, Leuven, Belgium"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"ORCID":"https:\/\/orcid.org\/0000-0001-7842-7774","authenticated-orcid":false,"given":"Moritz","family":"Brunion","sequence":"additional","affiliation":[{"name":"Imec, Leuven, Belgium"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"ORCID":"https:\/\/orcid.org\/0000-0001-7576-0803","authenticated-orcid":false,"given":"Marco","family":"Bertuletti","sequence":"additional","affiliation":[{"name":"Vrije Universiteit Brussel, Brussels, Belgium"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"ORCID":"https:\/\/orcid.org\/0000-0001-8068-3806","authenticated-orcid":false,"given":"Luca","family":"Benini","sequence":"additional","affiliation":[{"name":"ETH Zurich, Zürich, Switzerland"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Julien","family":"Ryckaert","sequence":"additional","affiliation":[{"name":"Imec, Leuven, Belgium"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"ORCID":"https:\/\/orcid.org\/0009-0000-2558-7504","authenticated-orcid":false,"given":"James","family":"Myers","sequence":"additional","affiliation":[{"name":"Imec, Leuven, Belgium"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"ORCID":"https:\/\/orcid.org\/0000-0001-7912-3692","authenticated-orcid":false,"given":"Dwaipayan","family":"Biswas","sequence":"additional","affiliation":[{"name":"Imec, Leuven, Belgium"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"ORCID":"https:\/\/orcid.org\/0000-0001-5915-5160","authenticated-orcid":false,"given":"Dragomir","family":"Milojevic","sequence":"additional","affiliation":[{"name":"Imec, Leuven, Belgium"}],"role":[{"vocabulary":"crossref","role":"author"}]}],"member":"263","reference":[{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/isscc.2014.6757323"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/tcad.2023.3333754"},{"key":"ref3","volume-title":"Computer Organization and Design: The Hardware\/Software Interface","author":"Hennessy","year":"2014"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/mc.2008.209"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/ICFCSE.2011.160"},{"key":"ref6","volume-title":"Memory Systems: Cache, Dram, Disk","author":"Jacob","year":"2010"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/tcsii.2021.3123676"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1109\/ted.2017.2737644"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1109\/tcpmt.2021.3117071"},{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1109\/vlsi-tsa54299.2022.9771038"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1109\/IEDM.2017.8268319"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1109\/lca.2020.2992644"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1109\/tnano.2017.2731871"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1109\/DATE.2009.5090625"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1109\/ASPDAC.2010.5419830"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.23919\/DATE.2018.8342223"},{"key":"ref17","doi-asserted-by":"publisher","DOI":"10.1109\/TC.2023.3307796"},{"key":"ref18","doi-asserted-by":"publisher","DOI":"10.23919\/DATE54114.2022.9774726"},{"key":"ref19","doi-asserted-by":"publisher","DOI":"10.1109\/CICC.2010.5617464"},{"key":"ref20","doi-asserted-by":"publisher","DOI":"10.7873\/DATE.2013.202"},{"key":"ref21","doi-asserted-by":"publisher","DOI":"10.1109\/IEDM19574.2021.9720614"},{"key":"ref22","doi-asserted-by":"publisher","DOI":"10.1109\/MM.2019.2944330"},{"key":"ref23","doi-asserted-by":"publisher","DOI":"10.1109\/ECTC.2010.5490753"},{"key":"ref24","doi-asserted-by":"publisher","DOI":"10.1109\/ASPDAC.2013.6509679"},{"key":"ref25","doi-asserted-by":"publisher","DOI":"10.1109\/TCSI.2023.3272658"},{"key":"ref26","doi-asserted-by":"publisher","DOI":"10.1109\/IEDM13553.2020.9371905"},{"key":"ref27","doi-asserted-by":"publisher","DOI":"10.1145\/2966986.2967013"},{"key":"ref28","doi-asserted-by":"publisher","DOI":"10.1109\/3DIC57175.2023.10155075"},{"key":"ref29","doi-asserted-by":"publisher","DOI":"10.1109\/3DIC48104.2019.9058901"},{"key":"ref30","doi-asserted-by":"publisher","DOI":"10.1145\/3531437.3539724"},{"key":"ref31","doi-asserted-by":"publisher","DOI":"10.1109\/ITherm51669.2021.9503209"},{"key":"ref32","doi-asserted-by":"publisher","DOI":"10.1109\/ISCAS58744.2024.10558687"},{"key":"ref33","doi-asserted-by":"publisher","DOI":"10.1117\/12.2552036"},{"key":"ref34","volume-title":"Cadence Integrity 3D-IC Platform","year":"2024"},{"key":"ref35","doi-asserted-by":"publisher","DOI":"10.1145\/216585.216588"},{"key":"ref36","doi-asserted-by":"publisher","DOI":"10.1109\/MM.2024.3373763"},{"key":"ref37","doi-asserted-by":"publisher","DOI":"10.1007\/978-3-031-40843-4_25"},{"key":"ref38","doi-asserted-by":"publisher","DOI":"10.4236\/wjet.2023.113036"},{"key":"ref39","doi-asserted-by":"publisher","DOI":"10.1109\/MSSC.2019.2910617"},{"key":"ref40","doi-asserted-by":"publisher","DOI":"10.3390\/app112311254"},{"key":"ref41","doi-asserted-by":"publisher","DOI":"10.1145\/1555754.1555801"},{"key":"ref42","doi-asserted-by":"publisher","DOI":"10.1145\/3569052.3578923"},{"key":"ref43","article-title":"LLM inference unveiled: Survey and roofline model insights","author":"Yuan","year":"2024","journal-title":"arXiv:2402.16363"},{"key":"ref44","doi-asserted-by":"publisher","DOI":"10.1109\/MM.2020.2972222"},{"key":"ref45","doi-asserted-by":"publisher","DOI":"10.1109\/ECTC51529.2024.00171"},{"key":"ref46","doi-asserted-by":"publisher","DOI":"10.1109\/ISVLSI61997.2024.00018"}],"container-title":["IEEE Transactions on Very Large Scale Integration (VLSI) Systems"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx8\/92\/10849961\/10720515.pdf?arnumber=10720515","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,1,23]],"date-time":"2025-01-23T18:54:51Z","timestamp":1737658491000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/10720515\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2025,2]]},"references-count":46,"journal-issue":{"issue":"2"},"URL":"https:\/\/doi.org\/10.1109\/tvlsi.2024.3467148","relation":{},"ISSN":["1063-8210","1557-9999"],"issn-type":[{"value":"1063-8210","type":"print"},{"value":"1557-9999","type":"electronic"}],"subject":[],"published":{"date-parts":[[2025,2]]}}}