{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,3,15]],"date-time":"2026-03-15T05:29:20Z","timestamp":1773552560952,"version":"3.50.1"},"reference-count":47,"publisher":"Institute of Electrical and Electronics Engineers (IEEE)","issue":"2","license":[{"start":{"date-parts":[[2025,2,1]],"date-time":"2025-02-01T00:00:00Z","timestamp":1738368000000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"},{"start":{"date-parts":[[2025,2,1]],"date-time":"2025-02-01T00:00:00Z","timestamp":1738368000000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2025,2,1]],"date-time":"2025-02-01T00:00:00Z","timestamp":1738368000000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"funder":[{"name":"Agency for Science, Technology and Research (A*STAR), Singapore, through the Nanosystems at the Edge Program","award":["A18A1b0055"],"award-info":[{"award-number":["A18A1b0055"]}]},{"name":"High Linearity Silicon Germanium Photonic Modulator for 6G Analog Radio over Fiber Project","award":["M24M8b0004"],"award-info":[{"award-number":["M24M8b0004"]}]}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["IEEE Trans. VLSI Syst."],"published-print":{"date-parts":[[2025,2]]},"DOI":"10.1109\/tvlsi.2024.3472270","type":"journal-article","created":{"date-parts":[[2024,10,15]],"date-time":"2024-10-15T17:29:19Z","timestamp":1729013359000},"page":"384-394","source":"Crossref","is-referenced-by-count":9,"title":["Edge PoolFormer: Modeling and Training of PoolFormer Network on RRAM Crossbar for Edge-AI Applications"],"prefix":"10.1109","volume":"33","author":[{"ORCID":"https:\/\/orcid.org\/0000-0002-7259-5192","authenticated-orcid":false,"given":"Tiancheng","family":"Cao","sequence":"first","affiliation":[{"name":"School of Electrical and Electronic Engineering, Nanyang Technological University, Jurong West, Singapore"}]},{"ORCID":"https:\/\/orcid.org\/0000-0003-3349-5890","authenticated-orcid":false,"given":"Weihao","family":"Yu","sequence":"additional","affiliation":[{"name":"Department of Electrical and Computer Engineering, National University of Singapore, Cluny Road, Singapore"}]},{"ORCID":"https:\/\/orcid.org\/0000-0002-0832-2982","authenticated-orcid":false,"given":"Yuan","family":"Gao","sequence":"additional","affiliation":[{"name":"Institute of Microelectronics (IME), Agency for Science, Technology and Research, Fusionopolis, Singapore"}]},{"given":"Chen","family":"Liu","sequence":"additional","affiliation":[{"name":"Institute of Microelectronics (IME), Agency for Science, Technology and Research, Fusionopolis, Singapore"}]},{"ORCID":"https:\/\/orcid.org\/0000-0003-1746-0890","authenticated-orcid":false,"given":"Tantan","family":"Zhang","sequence":"additional","affiliation":[{"name":"Institute of Microelectronics (IME), Agency for Science, Technology and Research, Fusionopolis, Singapore"}]},{"ORCID":"https:\/\/orcid.org\/0000-0001-8906-3777","authenticated-orcid":false,"given":"Shuicheng","family":"Yan","sequence":"additional","affiliation":[{"name":"Kunlun 2050 Research,, Skywork AI, Fusionopolis, Singapore"}]},{"ORCID":"https:\/\/orcid.org\/0000-0001-7466-8941","authenticated-orcid":false,"given":"Wang Ling","family":"Goh","sequence":"additional","affiliation":[{"name":"School of Electrical and Electronic Engineering, Nanyang Technological University, Jurong West, Singapore"}]}],"member":"263","reference":[{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.48550\/ARXIV.1706.03762"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1007\/978-3-030-58452-8_13"},{"key":"ref3","first-page":"1","article-title":"An image is worth 16 \u00d7 16 words: Transformers for image recognition at scale","volume-title":"Proc. Int. Conf. Learn. Represent. (ICLR)","author":"Dosovitskiy"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/ICCV48922.2021.00986"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/ICCV48922.2021.00060"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/CVPR52688.2022.00319"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2016.2616357"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1145\/3079856.3080246"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2018.2865489"},{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.18653\/v1\/2020.acl-main.686"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1109\/ICCV48922.2021.01204"},{"key":"ref12","article-title":"Escaping the big data paradigm with compact transformers","author":"Hassani","year":"2021","journal-title":"arXiv:2104.05704"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1109\/CVPR52688.2022.01055"},{"key":"ref14","first-page":"1","article-title":"ReTransformer: ReRAM-based processing-in-memory architecture for transformer acceleration","volume-title":"Proc. 39th Int. Conf. Comput.-Aided Design (ICCAD)","author":"Yang"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2021.3121264"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.1109\/ASP-DAC47756.2020.9045192"},{"key":"ref17","doi-asserted-by":"publisher","DOI":"10.1109\/TCSI.2021.3136355"},{"key":"ref18","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2020.3000185"},{"key":"ref19","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2019.2917764"},{"key":"ref20","doi-asserted-by":"publisher","DOI":"10.1109\/aicas57966.2023.10168639"},{"key":"ref21","doi-asserted-by":"publisher","DOI":"10.1109\/tvlsi.2019.2942267"},{"key":"ref22","doi-asserted-by":"publisher","DOI":"10.1145\/3362035"},{"key":"ref23","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2021.3063543"},{"key":"ref24","doi-asserted-by":"publisher","DOI":"10.3389\/frai.2021.659060"},{"key":"ref25","doi-asserted-by":"publisher","DOI":"10.1109\/tvlsi.2023.3282239"},{"key":"ref26","doi-asserted-by":"publisher","DOI":"10.1109\/biocas58349.2023.10389002"},{"key":"ref27","doi-asserted-by":"publisher","DOI":"10.1109\/tvlsi.2017.2734819"},{"key":"ref28","doi-asserted-by":"publisher","DOI":"10.1109\/HPCA53966.2022.00082"},{"key":"ref29","volume-title":"Learning Multiple Layers of Features From Tiny Images","author":"Krizhevsky","year":"2009"},{"key":"ref30","doi-asserted-by":"publisher","DOI":"10.1109\/CVPR.2016.90"},{"key":"ref31","doi-asserted-by":"publisher","DOI":"10.1109\/gaas.2000.906261"},{"key":"ref32","doi-asserted-by":"publisher","DOI":"10.1002\/aisy.202100249"},{"key":"ref33","doi-asserted-by":"publisher","DOI":"10.1109\/JPROC.2018.2790840"},{"key":"ref34","doi-asserted-by":"publisher","DOI":"10.1109\/JETCAS.2019.2933148"},{"key":"ref35","doi-asserted-by":"publisher","DOI":"10.23919\/DATE.2019.8715178"},{"key":"ref36","doi-asserted-by":"publisher","DOI":"10.1109\/MCSoC51149.2021.00025"},{"key":"ref37","doi-asserted-by":"publisher","DOI":"10.1109\/ICCAD.2014.7001330"},{"key":"ref38","first-page":"1","article-title":"Overcoming crossbar nonidealities in binary neural networks through learning","volume-title":"Proc. IEEE\/ACM Int. Symp. Nanosc. Archit. (NANOARCH)","author":"Fouda"},{"key":"ref39","doi-asserted-by":"publisher","DOI":"10.1109\/JETCAS.2022.3172170"},{"key":"ref40","doi-asserted-by":"publisher","DOI":"10.1109\/SOCC46988.2019.1570553082"},{"key":"ref41","doi-asserted-by":"publisher","DOI":"10.1109\/JETCAS.2022.3214334"},{"key":"ref42","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2018.2855145"},{"key":"ref43","doi-asserted-by":"publisher","DOI":"10.1109\/ijcnn54540.2023.10191448"},{"key":"ref44","doi-asserted-by":"publisher","DOI":"10.26599\/TST.2019.9010070"},{"key":"ref45","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2020.3043731"},{"issue":"1","key":"ref46","first-page":"8","article-title":"AD2 VNCS: Adversarial defense and device variation-tolerance in memristive crossbar-based neuromorphic computing systems","volume":"29","author":"Bi","year":"2024","journal-title":"IEEE Trans. Comput. Aided Des. Integr. Circuits Syst."},{"key":"ref47","doi-asserted-by":"publisher","DOI":"10.1109\/ISCAS48785.2022.9937336"}],"container-title":["IEEE Transactions on Very Large Scale Integration (VLSI) Systems"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx8\/92\/10849961\/10718352.pdf?arnumber=10718352","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,1,23]],"date-time":"2025-01-23T18:55:18Z","timestamp":1737658518000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/10718352\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2025,2]]},"references-count":47,"journal-issue":{"issue":"2"},"URL":"https:\/\/doi.org\/10.1109\/tvlsi.2024.3472270","relation":{},"ISSN":["1063-8210","1557-9999"],"issn-type":[{"value":"1063-8210","type":"print"},{"value":"1557-9999","type":"electronic"}],"subject":[],"published":{"date-parts":[[2025,2]]}}}