{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,10,31]],"date-time":"2025-10-31T08:07:19Z","timestamp":1761898039959,"version":"3.37.3"},"reference-count":36,"publisher":"Institute of Electrical and Electronics Engineers (IEEE)","issue":"1","license":[{"start":{"date-parts":[[2025,1,1]],"date-time":"2025-01-01T00:00:00Z","timestamp":1735689600000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"},{"start":{"date-parts":[[2025,1,1]],"date-time":"2025-01-01T00:00:00Z","timestamp":1735689600000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2025,1,1]],"date-time":"2025-01-01T00:00:00Z","timestamp":1735689600000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"funder":[{"DOI":"10.13039\/501100001809","name":"National Natural Science Foundation of China","doi-asserted-by":"publisher","award":["62474092","62371226","62134002"],"award-info":[{"award-number":["62474092","62371226","62134002"]}],"id":[{"id":"10.13039\/501100001809","id-type":"DOI","asserted-by":"publisher"}]},{"DOI":"10.13039\/501100001809","name":"National Science Fund for Distinguished Young Scholars","doi-asserted-by":"publisher","award":["62425404"],"award-info":[{"award-number":["62425404"]}],"id":[{"id":"10.13039\/501100001809","id-type":"DOI","asserted-by":"publisher"}]}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["IEEE Trans. VLSI Syst."],"published-print":{"date-parts":[[2025,1]]},"DOI":"10.1109\/tvlsi.2024.3496735","type":"journal-article","created":{"date-parts":[[2024,11,27]],"date-time":"2024-11-27T19:52:50Z","timestamp":1732737170000},"page":"248-260","source":"Crossref","is-referenced-by-count":2,"title":["A 0.09-pJ\/Bit Logic-Compatible Multiple-Time Programmable (MTP) Memory-Based PUF Design for IoT Applications"],"prefix":"10.1109","volume":"33","author":[{"given":"Shuming","family":"Guo","sequence":"first","affiliation":[{"name":"State Key Laboratory of ASIC and System School of Microelectronics, Fudan University, Shanghai, China"}]},{"ORCID":"https:\/\/orcid.org\/0000-0002-5939-3502","authenticated-orcid":false,"given":"Yinyin","family":"Lin","sequence":"additional","affiliation":[{"name":"State Key Laboratory of ASIC and System School of Microelectronics, Fudan University, Shanghai, China"}]},{"given":"Hao","family":"Wang","sequence":"additional","affiliation":[{"name":"Design Service Engineering Center, CSMC Technologies Corporation, Wuxi, China"}]},{"ORCID":"https:\/\/orcid.org\/0009-0008-4905-4751","authenticated-orcid":false,"given":"Yao","family":"Li","sequence":"additional","affiliation":[{"name":"College of Integrated Circuits, Nanjing University of Aeronautics and Astronautics, Nanjing, China"}]},{"ORCID":"https:\/\/orcid.org\/0000-0002-3028-8004","authenticated-orcid":false,"given":"Chongyan","family":"Gu","sequence":"additional","affiliation":[{"name":"Centre for Secure Information Technologies (CSIT), Queen’s University Belfast, Belfast, U.K."}]},{"ORCID":"https:\/\/orcid.org\/0000-0001-8398-8648","authenticated-orcid":false,"given":"Weiqiang","family":"Liu","sequence":"additional","affiliation":[{"name":"College of Integrated Circuits, Nanjing University of Aeronautics and Astronautics, Nanjing, China"}]},{"ORCID":"https:\/\/orcid.org\/0000-0002-6262-2329","authenticated-orcid":false,"given":"Yijun","family":"Cui","sequence":"additional","affiliation":[{"name":"College of Integrated Circuits, Nanjing University of Aeronautics and Astronautics, Nanjing, China"}]}],"member":"263","reference":[{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/ICCES51350.2021.9489235"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/ICIRCA57980.2023.10220814"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/ICBDS53701.2022.9935920"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/CAIS.2018.8442002"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1126\/science.1074376"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/JPROC.2014.2320516"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1007\/978-3-642-41395-7"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1088\/1361-6641\/aa8f07"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1145\/586110.586132"},{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1145\/3593807"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1002\/cpe.805"},{"key":"ref12","first-page":"9","article-title":"Physical unclonable functions for device authentication and secret key generation","volume-title":"Proc. 44th ACM IEEE Design Autom. Conf.","author":"Suh"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1109\/fpl.2007.4380646"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1109\/TED.2020.2976632"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1109\/TED.2020.2968272"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.1109\/TIE.2016.2585463"},{"key":"ref17","doi-asserted-by":"publisher","DOI":"10.1109\/TIE.2019.2896278"},{"key":"ref18","doi-asserted-by":"publisher","DOI":"10.1109\/.2006.1629479"},{"key":"ref19","doi-asserted-by":"publisher","DOI":"10.1007\/978-3-319-48339-9_10"},{"key":"ref20","doi-asserted-by":"publisher","DOI":"10.1109\/VLSI-TSA51926.2021.9440079"},{"key":"ref21","doi-asserted-by":"publisher","DOI":"10.1109\/LED.2016.2633490"},{"key":"ref22","doi-asserted-by":"publisher","DOI":"10.1109\/LED.2011.2111451"},{"key":"ref23","doi-asserted-by":"publisher","DOI":"10.1109\/DFT.2016.7684085"},{"key":"ref24","doi-asserted-by":"publisher","DOI":"10.1109\/JIOT.2020.3032518"},{"key":"ref25","doi-asserted-by":"publisher","DOI":"10.1109\/JIOT.2023.3253258"},{"key":"ref26","doi-asserted-by":"publisher","DOI":"10.1109\/OJNANO.2020.3040787"},{"key":"ref27","doi-asserted-by":"publisher","DOI":"10.1109\/TNANO.2015.2397956"},{"key":"ref28","doi-asserted-by":"publisher","DOI":"10.1109\/ted.2019.2903786"},{"key":"ref29","doi-asserted-by":"publisher","DOI":"10.1109\/LSSC.2018.2879216"},{"key":"ref30","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC.2019.8662537"},{"key":"ref31","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2021.3050295"},{"key":"ref32","doi-asserted-by":"publisher","DOI":"10.1109\/tifs.2014.2315743"},{"key":"ref33","doi-asserted-by":"publisher","DOI":"10.1109\/TIFS.2020.2976623"},{"key":"ref34","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2018.2865584"},{"key":"ref35","doi-asserted-by":"publisher","DOI":"10.1109\/ted.2019.2961505"},{"key":"ref36","doi-asserted-by":"publisher","DOI":"10.1109\/imw52921.2022.9779288"}],"container-title":["IEEE Transactions on Very Large Scale Integration (VLSI) Systems"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx8\/92\/10818617\/10769056.pdf?arnumber=10769056","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,1,15]],"date-time":"2025-01-15T20:32:34Z","timestamp":1736973154000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/10769056\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2025,1]]},"references-count":36,"journal-issue":{"issue":"1"},"URL":"https:\/\/doi.org\/10.1109\/tvlsi.2024.3496735","relation":{},"ISSN":["1063-8210","1557-9999"],"issn-type":[{"type":"print","value":"1063-8210"},{"type":"electronic","value":"1557-9999"}],"subject":[],"published":{"date-parts":[[2025,1]]}}}