{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,2,19]],"date-time":"2026-02-19T16:16:10Z","timestamp":1771517770177,"version":"3.50.1"},"reference-count":26,"publisher":"Institute of Electrical and Electronics Engineers (IEEE)","issue":"3","license":[{"start":{"date-parts":[[2025,3,1]],"date-time":"2025-03-01T00:00:00Z","timestamp":1740787200000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"},{"start":{"date-parts":[[2025,3,1]],"date-time":"2025-03-01T00:00:00Z","timestamp":1740787200000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2025,3,1]],"date-time":"2025-03-01T00:00:00Z","timestamp":1740787200000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"funder":[{"DOI":"10.13039\/501100003725","name":"National Research Foundation of Korea","doi-asserted-by":"crossref","id":[{"id":"10.13039\/501100003725","id-type":"DOI","asserted-by":"crossref"}]},{"DOI":"10.13039\/501100003725","name":"Korea Government","doi-asserted-by":"publisher","award":["2022R1A2C3012245"],"award-info":[{"award-number":["2022R1A2C3012245"]}],"id":[{"id":"10.13039\/501100003725","id-type":"DOI","asserted-by":"publisher"}]}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["IEEE Trans. VLSI Syst."],"published-print":{"date-parts":[[2025,3]]},"DOI":"10.1109\/tvlsi.2024.3496878","type":"journal-article","created":{"date-parts":[[2024,11,25]],"date-time":"2024-11-25T18:57:10Z","timestamp":1732561030000},"page":"662-672","source":"Crossref","is-referenced-by-count":1,"title":["A 28-Gb\/s Single-Ended PAM-4 Transceiver With Active-Inductor Equalizer and Amplitude- Detection LSB Decoder for Memory Interfaces"],"prefix":"10.1109","volume":"33","author":[{"ORCID":"https:\/\/orcid.org\/0009-0001-6794-3519","authenticated-orcid":false,"given":"Hwaseok","family":"Shin","sequence":"first","affiliation":[{"name":"Department of Semiconductor System Engineering, Korea University, Seoul, South Korea"}]},{"ORCID":"https:\/\/orcid.org\/0009-0006-7114-6164","authenticated-orcid":false,"given":"Hyoshin","family":"Kang","sequence":"additional","affiliation":[{"name":"Department of Semiconductor System Engineering, Korea University, Seoul, South Korea"}]},{"ORCID":"https:\/\/orcid.org\/0000-0003-0594-4206","authenticated-orcid":false,"given":"Yoonjae","family":"Choi","sequence":"additional","affiliation":[{"name":"Department of Electrical Engineering, Korea University, Seoul, South Korea"}]},{"ORCID":"https:\/\/orcid.org\/0000-0002-8247-6277","authenticated-orcid":false,"given":"Jincheol","family":"Sim","sequence":"additional","affiliation":[{"name":"Department of Electrical Engineering, Korea University, Seoul, South Korea"}]},{"ORCID":"https:\/\/orcid.org\/0000-0001-9545-9196","authenticated-orcid":false,"given":"Jonghyuck","family":"Choi","sequence":"additional","affiliation":[{"name":"Department of Electrical Engineering, Korea University, Seoul, South Korea"}]},{"ORCID":"https:\/\/orcid.org\/0009-0006-7100-4051","authenticated-orcid":false,"given":"Youngwook","family":"Kwon","sequence":"additional","affiliation":[{"name":"Department of Electrical Engineering, Korea University, Seoul, South Korea"}]},{"ORCID":"https:\/\/orcid.org\/0009-0003-6701-5370","authenticated-orcid":false,"given":"Seungwoo","family":"Park","sequence":"additional","affiliation":[{"name":"Department of Semiconductor System Engineering, Korea University, Seoul, South Korea"}]},{"ORCID":"https:\/\/orcid.org\/0000-0002-3695-2703","authenticated-orcid":false,"given":"Seongcheol","family":"Kim","sequence":"additional","affiliation":[{"name":"Department of Semiconductor System Engineering, Korea University, Seoul, South Korea"}]},{"ORCID":"https:\/\/orcid.org\/0009-0003-6748-1283","authenticated-orcid":false,"given":"Changmin","family":"Sim","sequence":"additional","affiliation":[{"name":"Department of Semiconductor System Engineering, Korea University, Seoul, South Korea"}]},{"ORCID":"https:\/\/orcid.org\/0009-0004-0860-1895","authenticated-orcid":false,"given":"Junseob","family":"So","sequence":"additional","affiliation":[{"name":"Department of Semiconductor System Engineering, Korea University, Seoul, South Korea"}]},{"ORCID":"https:\/\/orcid.org\/0009-0001-2072-2989","authenticated-orcid":false,"given":"Taehwan","family":"Kim","sequence":"additional","affiliation":[{"name":"Department of Electrical Engineering, Korea University, Seoul, South Korea"}]},{"ORCID":"https:\/\/orcid.org\/0000-0003-4379-7905","authenticated-orcid":false,"given":"Chulwoo","family":"Kim","sequence":"additional","affiliation":[{"name":"Department of Electrical Engineering, Korea University, Seoul, South Korea"}]}],"member":"263","reference":[{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC42614.2022.9731537"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/isscc42613.2021.9366050"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/isscc19947.2020.9062937"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/A-SSCC56115.2022.9980755"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC19947.2020.9063137"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2021.3104093"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2020.3042240"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1109\/VLSITechnologyandCir46769.2022.9830507"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2020.3038818"},{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1109\/jssc.2017.2705070"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1109\/CICC53496.2022.9772814"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1109\/jssc.2024.3403149"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1109\/jssc.2020.3025285"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2021.3098821"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC42615.2023.10067541"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.1109\/jssc.2024.3401213"},{"key":"ref17","doi-asserted-by":"publisher","DOI":"10.1109\/jssc.2024.3358337"},{"key":"ref18","doi-asserted-by":"publisher","DOI":"10.1109\/TCSI.2023.3241929"},{"key":"ref19","doi-asserted-by":"publisher","DOI":"10.1109\/TCSII.2022.3159769"},{"key":"ref20","doi-asserted-by":"publisher","DOI":"10.1109\/TCSI.2017.2717900"},{"key":"ref21","doi-asserted-by":"publisher","DOI":"10.1109\/VLSIC.2018.8502377"},{"key":"ref22","volume-title":"OIF CEI-04.0 Standards","year":"2019"},{"key":"ref23","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2020.3006864"},{"key":"ref24","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2007.903076"},{"key":"ref25","doi-asserted-by":"publisher","DOI":"10.1109\/MSSC.2020.3021865"},{"key":"ref26","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2020.2987690"}],"container-title":["IEEE Transactions on Very Large Scale Integration (VLSI) Systems"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx8\/92\/10903148\/10767360.pdf?arnumber=10767360","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,4,15]],"date-time":"2025-04-15T17:40:24Z","timestamp":1744738824000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/10767360\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2025,3]]},"references-count":26,"journal-issue":{"issue":"3"},"URL":"https:\/\/doi.org\/10.1109\/tvlsi.2024.3496878","relation":{},"ISSN":["1063-8210","1557-9999"],"issn-type":[{"value":"1063-8210","type":"print"},{"value":"1557-9999","type":"electronic"}],"subject":[],"published":{"date-parts":[[2025,3]]}}}