{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,6,14]],"date-time":"2026-06-14T20:01:57Z","timestamp":1781467317150,"version":"3.54.1"},"reference-count":34,"publisher":"Institute of Electrical and Electronics Engineers (IEEE)","issue":"4","license":[{"start":{"date-parts":[[2025,4,1]],"date-time":"2025-04-01T00:00:00Z","timestamp":1743465600000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"},{"start":{"date-parts":[[2025,4,1]],"date-time":"2025-04-01T00:00:00Z","timestamp":1743465600000},"content-version":"am","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"},{"start":{"date-parts":[[2025,4,1]],"date-time":"2025-04-01T00:00:00Z","timestamp":1743465600000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2025,4,1]],"date-time":"2025-04-01T00:00:00Z","timestamp":1743465600000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"funder":[{"DOI":"10.13039\/100000001","name":"National Science Foundation","doi-asserted-by":"publisher","award":["CNS-2310142"],"award-info":[{"award-number":["CNS-2310142"]}],"id":[{"id":"10.13039\/100000001","id-type":"DOI","asserted-by":"publisher"}]}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["IEEE Trans. VLSI Syst."],"published-print":{"date-parts":[[2025,4]]},"DOI":"10.1109\/tvlsi.2025.3527382","type":"journal-article","created":{"date-parts":[[2025,1,15]],"date-time":"2025-01-15T20:32:40Z","timestamp":1736973160000},"page":"1118-1131","source":"Crossref","is-referenced-by-count":13,"title":["SPICED+: Syntactical Bug Pattern Identification and Correction of Trojans in A\/MS Circuits Using LLM-Enhanced Detection"],"prefix":"10.1109","volume":"33","author":[{"ORCID":"https:\/\/orcid.org\/0000-0002-6738-805X","authenticated-orcid":false,"given":"Jayeeta","family":"Chaudhuri","sequence":"first","affiliation":[{"name":"School of Electrical, Computer, and Energy Engineering, Arizona State University, Tempe, AZ, USA"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Dhruv","family":"Thapar","sequence":"additional","affiliation":[{"name":"School of Electrical, Computer, and Energy Engineering, Arizona State University, Tempe, AZ, USA"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Arjun","family":"Chaudhuri","sequence":"additional","affiliation":[{"name":"NVIDIA Corporation, Santa Clara, CA, USA"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Farshad","family":"Firouzi","sequence":"additional","affiliation":[{"name":"School of Electrical, Computer, and Energy Engineering, Arizona State University, Tempe, AZ, USA"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"ORCID":"https:\/\/orcid.org\/0000-0003-4475-6435","authenticated-orcid":false,"given":"Krishnendu","family":"Chakrabarty","sequence":"additional","affiliation":[{"name":"School of Electrical, Computer, and Energy Engineering, Arizona State University, Tempe, AZ, USA"}],"role":[{"vocabulary":"crossref","role":"author"}]}],"member":"263","reference":[{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/PAINE62042.2024.10792717"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1007\/s41635-017-0024-z"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/JPROC.2014.2335155"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/VTS52500.2021.9794141"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/SP.2016.10"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1145\/3489517.3530666"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/ISCAS48785.2022.9937796"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1109\/ITC50671.2022.00022"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2024.3384948"},{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1145\/3643681"},{"key":"ref11","article-title":"LLM4EDA: Emerging progress in large language models for electronic design automation","author":"Zhong","year":"2023","journal-title":"arXiv:2401.12224"},{"key":"ref12","article-title":"ADO-LLM: Analog design Bayesian optimization with in-context learning of large language models","author":"Yin","year":"2024","journal-title":"arXiv:2406.18770"},{"key":"ref13","article-title":"AnalogCoder: Analog circuit design via training-free code generation","author":"Lai","year":"2024","journal-title":"arXiv:2405.14918"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1109\/MLCAD62225.2024.10740211"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1109\/LAD62341.2024.10691781"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.1109\/MLCAD58807.2023.10299874"},{"key":"ref17","article-title":"ChipNeMo: Domain-adapted LLMs for chip design","author":"Liu","year":"2023","journal-title":"arXiv:2311.00176"},{"key":"ref18","doi-asserted-by":"publisher","DOI":"10.23919\/DATE56975.2023.10137086"},{"key":"ref19","article-title":"SENTAUR: Security EnhaNced trojan assessment using LLMs against undesirable revisions","author":"Bhandari","year":"2024","journal-title":"arXiv:2407.12352"},{"key":"ref20","article-title":"RTLFixer: Automatically fixing RTL syntax errors with large language models","author":"Tsai","year":"2023","journal-title":"arXiv:2311.16543"},{"key":"ref21","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2024.3383347"},{"key":"ref22","doi-asserted-by":"publisher","DOI":"10.1109\/TIFS.2024.3374558"},{"key":"ref23","doi-asserted-by":"publisher","DOI":"10.1007\/978-3-031-61486-6_11"},{"key":"ref24","doi-asserted-by":"publisher","DOI":"10.1109\/HOST55342.2024.10545393"},{"key":"ref25","article-title":"Code Llama: Open foundation models for code","author":"Rozi\u00e8re","year":"2023","journal-title":"arXiv:2308.12950"},{"key":"ref26","doi-asserted-by":"publisher","DOI":"10.1145\/3236024.3275439"},{"key":"ref27","doi-asserted-by":"publisher","DOI":"10.1109\/MS.2008.130"},{"key":"ref28","doi-asserted-by":"publisher","DOI":"10.1109\/ATS47505.2019.00018"},{"key":"ref29","doi-asserted-by":"publisher","DOI":"10.23919\/DATE51398.2021.9474174"},{"key":"ref30","volume-title":"Adsbenchmark","year":"2024"},{"key":"ref31","volume-title":"The Spice Book","author":"Vladimirescu","year":"1994"},{"key":"ref32","doi-asserted-by":"publisher","DOI":"10.1109\/MC.2010.369"},{"key":"ref33","volume-title":"Pricing","year":"2024"},{"key":"ref34","volume-title":"Custom Compiler","year":"2024"}],"container-title":["IEEE Transactions on Very Large Scale Integration (VLSI) Systems"],"original-title":[],"link":[{"URL":"https:\/\/ieeexplore.ieee.org\/ielam\/92\/10937162\/10843334-aam.pdf","content-type":"application\/pdf","content-version":"am","intended-application":"syndication"},{"URL":"http:\/\/xplorestaging.ieee.org\/ielx8\/92\/10937162\/10843334.pdf?arnumber=10843334","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,3,24]],"date-time":"2025-03-24T19:16:22Z","timestamp":1742843782000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/10843334\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2025,4]]},"references-count":34,"journal-issue":{"issue":"4"},"URL":"https:\/\/doi.org\/10.1109\/tvlsi.2025.3527382","relation":{},"ISSN":["1063-8210","1557-9999"],"issn-type":[{"value":"1063-8210","type":"print"},{"value":"1557-9999","type":"electronic"}],"subject":[],"published":{"date-parts":[[2025,4]]}}}