{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,5,29]],"date-time":"2025-05-29T02:25:42Z","timestamp":1748485542842,"version":"3.40.4"},"reference-count":20,"publisher":"Institute of Electrical and Electronics Engineers (IEEE)","issue":"5","license":[{"start":{"date-parts":[[2025,5,1]],"date-time":"2025-05-01T00:00:00Z","timestamp":1746057600000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"},{"start":{"date-parts":[[2025,5,1]],"date-time":"2025-05-01T00:00:00Z","timestamp":1746057600000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2025,5,1]],"date-time":"2025-05-01T00:00:00Z","timestamp":1746057600000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"funder":[{"name":"Tianjin Key Laboratory of Aviation Fire Protection System","award":["FH2024-KF02"],"award-info":[{"award-number":["FH2024-KF02"]}]}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["IEEE Trans. VLSI Syst."],"published-print":{"date-parts":[[2025,5]]},"DOI":"10.1109\/tvlsi.2025.3529690","type":"journal-article","created":{"date-parts":[[2025,1,27]],"date-time":"2025-01-27T19:11:08Z","timestamp":1738005068000},"page":"1292-1303","source":"Crossref","is-referenced-by-count":1,"title":["An Area-Efficient VLSI Architecture for High-Throughput Computation of the 2-D DWT"],"prefix":"10.1109","volume":"33","author":[{"ORCID":"https:\/\/orcid.org\/0009-0004-9489-4355","authenticated-orcid":false,"given":"Yuzhou","family":"Dai","sequence":"first","affiliation":[{"name":"School of Microelectronics, Tianjin University, Tianjin, China"}]},{"ORCID":"https:\/\/orcid.org\/0000-0002-2601-3198","authenticated-orcid":false,"given":"Wei","family":"Zhang","sequence":"additional","affiliation":[{"name":"School of Microelectronics, Tianjin University, Tianjin, China"}]},{"given":"Lin","family":"Shi","sequence":"additional","affiliation":[{"name":"Tianjin Key Laboratory of Aviation Fire Protection System, Tianjin, China"}]},{"ORCID":"https:\/\/orcid.org\/0009-0008-6100-4044","authenticated-orcid":false,"given":"Qitao","family":"Li","sequence":"additional","affiliation":[{"name":"School of Microelectronics, Tianjin University, Tianjin, China"}]},{"ORCID":"https:\/\/orcid.org\/0000-0002-5205-783X","authenticated-orcid":false,"given":"Zhuolun","family":"Wu","sequence":"additional","affiliation":[{"name":"School of Microelectronics, Tianjin University, Tianjin, China"}]},{"ORCID":"https:\/\/orcid.org\/0000-0001-8488-5480","authenticated-orcid":false,"given":"Yanyan","family":"Liu","sequence":"additional","affiliation":[{"name":"College of Electronic Information and Optical Engineering, Nankai University, Tianjin, China"}]}],"member":"263","reference":[{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/34.192463"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1080\/00207217.2020.1756442"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1007\/s11042-020-10258-0"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/JSEN.2019.2930006"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/JSEN.2023.3235371"},{"key":"ref6","first-page":"319","article-title":"Efficient FPGA implementations of lifting based DWT using partial reconfiguration","volume-title":"Proc. 36th Int. Conf. VLSI Design 22nd Int. Conf. Embedded Syst. (VLSID)","author":"Basiri"},{"key":"ref7","doi-asserted-by":"crossref","first-page":"136","DOI":"10.1016\/j.vlsi.2021.10.001","article-title":"Efficient VLSI architecture of 3D discrete transformation","volume":"82","author":"Basiri","year":"2022","journal-title":"Integr. VLSI J."},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1007\/s11554-023-01396-3"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1007\/s00034-018-0775-y"},{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1109\/JSEN.2023.3247596"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.3390\/app9214635"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.3390\/electronics13234668"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1109\/TSP.2004.823509"},{"volume-title":"CMOS VLSI Design: A Circuits and Systems Perspective","year":"2005","author":"Weste","key":"ref14"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1109\/ISCAS.1999.779957"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.1109\/TSP.2004.826175"},{"key":"ref17","doi-asserted-by":"publisher","DOI":"10.1109\/MECO55406.2022.9797219"},{"key":"ref18","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2006.889368"},{"key":"ref19","doi-asserted-by":"publisher","DOI":"10.1109\/TCSVT.2012.2203745"},{"key":"ref20","doi-asserted-by":"publisher","DOI":"10.1109\/76.974679"}],"container-title":["IEEE Transactions on Very Large Scale Integration (VLSI) Systems"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx8\/92\/10977652\/10855161.pdf?arnumber=10855161","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,4,26]],"date-time":"2025-04-26T04:52:23Z","timestamp":1745643143000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/10855161\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2025,5]]},"references-count":20,"journal-issue":{"issue":"5"},"URL":"https:\/\/doi.org\/10.1109\/tvlsi.2025.3529690","relation":{},"ISSN":["1063-8210","1557-9999"],"issn-type":[{"type":"print","value":"1063-8210"},{"type":"electronic","value":"1557-9999"}],"subject":[],"published":{"date-parts":[[2025,5]]}}}