{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,5,13]],"date-time":"2026-05-13T17:41:26Z","timestamp":1778694086395,"version":"3.51.4"},"reference-count":19,"publisher":"Institute of Electrical and Electronics Engineers (IEEE)","issue":"8","license":[{"start":{"date-parts":[[2025,8,1]],"date-time":"2025-08-01T00:00:00Z","timestamp":1754006400000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"},{"start":{"date-parts":[[2025,8,1]],"date-time":"2025-08-01T00:00:00Z","timestamp":1754006400000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2025,8,1]],"date-time":"2025-08-01T00:00:00Z","timestamp":1754006400000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"funder":[{"name":"European Union (Horizon Europe) Project NeuroSoC","award":["101070634."],"award-info":[{"award-number":["101070634."]}]}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["IEEE Trans. VLSI Syst."],"published-print":{"date-parts":[[2025,8]]},"DOI":"10.1109\/tvlsi.2025.3571677","type":"journal-article","created":{"date-parts":[[2025,6,3]],"date-time":"2025-06-03T13:54:59Z","timestamp":1748958899000},"page":"2334-2338","source":"Crossref","is-referenced-by-count":3,"title":["A Scalable FPGA Architecture With Adaptive Memory Utilization for GEMM-Based Operations"],"prefix":"10.1109","volume":"33","author":[{"ORCID":"https:\/\/orcid.org\/0000-0003-1669-5233","authenticated-orcid":false,"given":"Anastasios","family":"Petropoulos","sequence":"first","affiliation":[{"name":"Department of Electrical and Computer Engineering, University of Patras, Patras, Greece"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"ORCID":"https:\/\/orcid.org\/0000-0002-7863-1051","authenticated-orcid":false,"given":"Theodore","family":"Antonakopoulos","sequence":"additional","affiliation":[{"name":"Department of Electrical and Computer Engineering, University of Patras, Patras, Greece"}],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2019.2939726"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/FPL.2018.00077"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2019.2930577"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1145\/3473334"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2024.3383871"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1145\/3431920.3439292"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/FPL64840.2024.00035"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1109\/FPL.2019.00061"},{"key":"ref9","volume-title":"AMD, Inc","year":"2016"},{"key":"ref10","volume-title":"AMD, Inc","year":"2021"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1109\/CVPR.2016.90"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1109\/TCSII.2022.3142807"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1109\/TC.2021.3075765"},{"key":"ref14","volume-title":"AMD, Inc","year":"2024"},{"key":"ref15","volume-title":"AMD, Inc","year":"2021"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.1038\/s41928-023-01010-1"},{"key":"ref17","doi-asserted-by":"publisher","DOI":"10.1109\/ISCAS45731.2020.9181021"},{"key":"ref18","doi-asserted-by":"publisher","DOI":"10.1063\/5.0168089"},{"key":"ref19","doi-asserted-by":"publisher","DOI":"10.1109\/IEDM50854.2024.10873479"}],"container-title":["IEEE Transactions on Very Large Scale Integration (VLSI) Systems"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx8\/92\/11096973\/11021575.pdf?arnumber=11021575","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,7,26]],"date-time":"2025-07-26T06:17:29Z","timestamp":1753510649000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/11021575\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2025,8]]},"references-count":19,"journal-issue":{"issue":"8"},"URL":"https:\/\/doi.org\/10.1109\/tvlsi.2025.3571677","relation":{},"ISSN":["1063-8210","1557-9999"],"issn-type":[{"value":"1063-8210","type":"print"},{"value":"1557-9999","type":"electronic"}],"subject":[],"published":{"date-parts":[[2025,8]]}}}