{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,5,29]],"date-time":"2026-05-29T20:06:00Z","timestamp":1780085160737,"version":"3.54.0"},"reference-count":1,"publisher":"Institute of Electrical and Electronics Engineers (IEEE)","issue":"5","license":[{"start":{"date-parts":[[2026,5,1]],"date-time":"2026-05-01T00:00:00Z","timestamp":1777593600000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"},{"start":{"date-parts":[[2026,5,1]],"date-time":"2026-05-01T00:00:00Z","timestamp":1777593600000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2026,5,1]],"date-time":"2026-05-01T00:00:00Z","timestamp":1777593600000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["IEEE Trans. VLSI Syst."],"published-print":{"date-parts":[[2026,5]]},"DOI":"10.1109\/tvlsi.2026.3691186","type":"journal-article","created":{"date-parts":[[2026,5,28]],"date-time":"2026-05-28T23:03:06Z","timestamp":1780009386000},"page":"1697-1697","source":"Crossref","is-referenced-by-count":0,"title":["Corrections to \u201cA Hardware Attack Secure SRAM: A HAS-16T SRAM Cell Resistant to Side Channel Attacks and Fault-Injection Attacks\u201d"],"prefix":"10.1109","volume":"34","author":[{"ORCID":"https:\/\/orcid.org\/0000-0002-9926-2697","authenticated-orcid":false,"given":"Priyanka","family":"Sharma","sequence":"first","affiliation":[{"name":"Department of Electronics Instrumentation, Institute of Engineering and Technology, Devi Ahilya Vishwavidyalaya, Indore, Madhya Pradesh, India"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"ORCID":"https:\/\/orcid.org\/0000-0002-9946-0212","authenticated-orcid":false,"given":"Nitesh","family":"Kumar Soni","sequence":"additional","affiliation":[{"name":"Department of Electronics Engineering, Medicaps University, Indore, Madhya Pradesh, India"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Vaibhav","family":"Neema","sequence":"additional","affiliation":[{"name":"Department of Electronics and Telecommunication, Institute of Engineering and Technology, Devi Ahilya Vishwavidyalaya, Indore, Madhya Pradesh, India"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"ORCID":"https:\/\/orcid.org\/0000-0002-6055-3198","authenticated-orcid":false,"given":"Shailesh","family":"Singh Chouhan","sequence":"additional","affiliation":[{"name":"Department of Computer Science, Electrical and Space Engineering, Luleå University of Technology, Luleå, Norbotten, Sweden"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Rakesh","family":"Singhai","sequence":"additional","affiliation":[{"name":"Devi Ahilya Vishwavidyalaya, Indore, Madhya Pradesh, India"}],"role":[{"vocabulary":"crossref","role":"author"}]}],"member":"263","reference":[{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2026.3657601"}],"container-title":["IEEE Transactions on Very Large Scale Integration (VLSI) Systems"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx8\/92\/11538104\/11538106.pdf?arnumber=11538106","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2026,5,29]],"date-time":"2026-05-29T19:59:19Z","timestamp":1780084759000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/11538106\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2026,5]]},"references-count":1,"journal-issue":{"issue":"5"},"URL":"https:\/\/doi.org\/10.1109\/tvlsi.2026.3691186","relation":{},"ISSN":["1063-8210","1557-9999"],"issn-type":[{"value":"1063-8210","type":"print"},{"value":"1557-9999","type":"electronic"}],"subject":[],"published":{"date-parts":[[2026,5]]}}}