{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,10,30]],"date-time":"2024-10-30T15:31:43Z","timestamp":1730302303773,"version":"3.28.0"},"reference-count":28,"publisher":"IEEE","license":[{"start":{"date-parts":[[2020,7,1]],"date-time":"2020-07-01T00:00:00Z","timestamp":1593561600000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"},{"start":{"date-parts":[[2020,7,1]],"date-time":"2020-07-01T00:00:00Z","timestamp":1593561600000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2020,7,1]],"date-time":"2020-07-01T00:00:00Z","timestamp":1593561600000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2020,7]]},"DOI":"10.1109\/vdat50263.2020.9190243","type":"proceedings-article","created":{"date-parts":[[2020,9,10]],"date-time":"2020-09-10T21:16:08Z","timestamp":1599772568000},"page":"1-5","source":"Crossref","is-referenced-by-count":1,"title":["Scalable VLSI Architecture for Hadamard Transforms of HEVC\/H.265 Video Coding Standard"],"prefix":"10.1109","author":[{"given":"Karam","family":"Singh","sequence":"first","affiliation":[]},{"given":"Shaik Rafi","family":"Ahamed","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1007\/978-1-4419-0959-6"},{"key":"ref11","first-page":"9","article-title":"Motion-compensated interframe coding for video conferencing","author":"koga","year":"0","journal-title":"Proc NTC 81"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1109\/83.821744"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1109\/TCSVT.2002.1003474"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1109\/ICCE-Berlin.2012.6336494"},{"key":"ref15","first-page":"95","article-title":"TZ Search pattern search improvement for HEVC motion estimation modules","author":"kibeya","year":"0","journal-title":"1st Int Conf Advanced Technol for Signal and Image Process (A TSIP)"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.1109\/INDICON.2015.7443614"},{"key":"ref17","article-title":"Computationally Efficient Motion Estimation Algorithm for HEVC","author":"singh","year":"2017","journal-title":"J Sign Process Syst"},{"key":"ref18","doi-asserted-by":"publisher","DOI":"10.1109\/ISCAS.2019.8702775"},{"key":"ref19","doi-asserted-by":"publisher","DOI":"10.1109\/TCSVT.2012.2221255"},{"key":"ref28","doi-asserted-by":"crossref","first-page":"601","DOI":"10.1109\/TCSVT.2011.2129330","article-title":"Register Length Analysis and VLSI Optimization of VBS Hadamard Transform in H.264\/AVC","volume":"21","author":"liu","year":"2011","journal-title":"IEEE Trans Circuits Syst Video Technol"},{"key":"ref4","doi-asserted-by":"crossref","first-page":"560","DOI":"10.1109\/TCSVT.2003.815165","article-title":"overview of the h.264\/avc video coding standard","volume":"13","author":"wiegand","year":"2003","journal-title":"IEEE Transactions on Circuits and Systems for Video Technology"},{"key":"ref27","doi-asserted-by":"publisher","DOI":"10.1109\/VLSID.2016.63"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/ICCE.2013.6486822"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/TCSVT.2014.2308453"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/INDCON.2013.6726117"},{"journal-title":"High Efficiency Video Coding (HEVC) Algorithms and Architectures","year":"2014","author":"vivienne","key":"ref8"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/TMM.2012.2231060"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/TCE.2018.2867823"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1109\/ASPDAC.2014.6742902"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/TCSVT.2012.2221191"},{"key":"ref20","doi-asserted-by":"publisher","DOI":"10.1109\/TCSVT.2018.2890204"},{"key":"ref22","doi-asserted-by":"publisher","DOI":"10.1109\/TIP.2018.2889917"},{"key":"ref21","doi-asserted-by":"publisher","DOI":"10.1145\/3338852.3339859"},{"key":"ref24","first-page":"ii-800","article-title":"Parallel 4×4 2D transform and inverse transform architecture for MPEG-4 AVC\/H.264","volume":"2","author":"wang","year":"0","journal-title":"Int Symp Circuits Syst 2003 ISCAS ‘03"},{"key":"ref23","article-title":"High Efficiency Video Coding (HEVC) Test Model 10 (HM10) Encoder Description","author":"kim","year":"0","journal-title":"Joint Collaborative Team on Video Coding (JCT-VC) of ITU-T SG16 WP3 and ISO\/IEC JTC1\/SC29\/WG11 12th Meeting Geneva Document JCTVC-L1002"},{"key":"ref26","doi-asserted-by":"publisher","DOI":"10.1109\/ICECS.2015.7440382"},{"key":"ref25","first-page":"434","article-title":"A full-mode FME VLSI architecture based on 8×8\/4×4 adaptive Hadamard Transform for QFHD H.264\/AVC encoder","author":"liu","year":"0","journal-title":"2011 IEEE\/IFIP 19th International Conference on VLSI and System-on-Chip"}],"event":{"name":"2020 24th International Symposium on VLSI Design and Test (VDAT)","start":{"date-parts":[[2020,7,23]]},"location":"Bhubaneswar, India","end":{"date-parts":[[2020,7,25]]}},"container-title":["2020 24th International Symposium on VLSI Design and Test (VDAT)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/9184154\/9190176\/09190243.pdf?arnumber=9190243","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2022,6,30]],"date-time":"2022-06-30T15:17:16Z","timestamp":1656602236000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/9190243\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2020,7]]},"references-count":28,"URL":"https:\/\/doi.org\/10.1109\/vdat50263.2020.9190243","relation":{},"subject":[],"published":{"date-parts":[[2020,7]]}}}