{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,4,23]],"date-time":"2025-04-23T05:51:12Z","timestamp":1745387472148},"reference-count":15,"publisher":"IEEE","license":[{"start":{"date-parts":[[2020,7,1]],"date-time":"2020-07-01T00:00:00Z","timestamp":1593561600000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"},{"start":{"date-parts":[[2020,7,1]],"date-time":"2020-07-01T00:00:00Z","timestamp":1593561600000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2020,7,1]],"date-time":"2020-07-01T00:00:00Z","timestamp":1593561600000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2020,7]]},"DOI":"10.1109\/vdat50263.2020.9190474","type":"proceedings-article","created":{"date-parts":[[2020,9,10]],"date-time":"2020-09-10T17:16:08Z","timestamp":1599758168000},"page":"1-4","source":"Crossref","is-referenced-by-count":6,"title":["ReARM: A Reconfigurable Approximate Rounding-Based Multiplier for Image Processing"],"prefix":"10.1109","author":[{"given":"Rajat","family":"Bhattacharjya","sequence":"first","affiliation":[]},{"given":"Alish","family":"Kanani","sequence":"additional","affiliation":[]},{"given":"Neeraj","family":"Goel","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"doi-asserted-by":"publisher","key":"ref10","DOI":"10.1109\/ReCoSoC.2013.6581532"},{"doi-asserted-by":"publisher","key":"ref11","DOI":"10.1109\/TC.2012.146"},{"year":"2015","author":"harris","journal-title":"Digital Design and Computer Architecture ARM Edition (1st ed )","key":"ref12"},{"doi-asserted-by":"publisher","key":"ref13","DOI":"10.1109\/ICACCA.2016.7578854"},{"doi-asserted-by":"publisher","key":"ref14","DOI":"10.1109\/TCSVT.2016.2595326"},{"doi-asserted-by":"publisher","key":"ref15","DOI":"10.1109\/TIP.2003.819861"},{"doi-asserted-by":"publisher","key":"ref4","DOI":"10.1109\/TVLSI.2016.2587696"},{"doi-asserted-by":"publisher","key":"ref3","DOI":"10.1007\/978-3-319-99322-5_3"},{"doi-asserted-by":"publisher","key":"ref6","DOI":"10.1145\/3060403.3060409"},{"doi-asserted-by":"publisher","key":"ref5","DOI":"10.1109\/TENCON.2015.7372902"},{"doi-asserted-by":"publisher","key":"ref8","DOI":"10.1109\/ICCD.2017.22"},{"doi-asserted-by":"publisher","key":"ref7","DOI":"10.23919\/DATE.2019.8714868"},{"doi-asserted-by":"publisher","key":"ref2","DOI":"10.1109\/TVLSI.2018.2890712"},{"doi-asserted-by":"publisher","key":"ref1","DOI":"10.1109\/MDAT.2015.2505723"},{"doi-asserted-by":"publisher","key":"ref9","DOI":"10.1145\/3299874.3317975"}],"event":{"name":"2020 24th International Symposium on VLSI Design and Test (VDAT)","start":{"date-parts":[[2020,7,23]]},"location":"Bhubaneswar, India","end":{"date-parts":[[2020,7,25]]}},"container-title":["2020 24th International Symposium on VLSI Design and Test (VDAT)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/9184154\/9190176\/09190474.pdf?arnumber=9190474","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2022,6,30]],"date-time":"2022-06-30T11:17:16Z","timestamp":1656587836000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/9190474\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2020,7]]},"references-count":15,"URL":"https:\/\/doi.org\/10.1109\/vdat50263.2020.9190474","relation":{},"subject":[],"published":{"date-parts":[[2020,7]]}}}