{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,9,4]],"date-time":"2024-09-04T21:55:21Z","timestamp":1725486921328},"reference-count":6,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2013,4]]},"DOI":"10.1109\/vldi-dat.2013.6533835","type":"proceedings-article","created":{"date-parts":[[2013,6,26]],"date-time":"2013-06-26T17:24:15Z","timestamp":1372267455000},"page":"1-4","source":"Crossref","is-referenced-by-count":0,"title":["A 6.4 Gb\/s source synchronous receiver core with variable offset equalizer in 65nm CMOS"],"prefix":"10.1109","author":[{"family":"Kunzhi Yu","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"family":"Xuqiang Zheng","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"family":"Ke Huang","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"family":"Ma Xuan","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"family":"Ziqiang Wang","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"family":"Chun Zhang","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"family":"Zhihua Wang","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"key":"3","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2007.908692"},{"key":"2","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2010.2076214"},{"key":"1","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2010.2077350"},{"key":"6","doi-asserted-by":"publisher","DOI":"10.1109\/MWSCAS.2012.6292174"},{"key":"5","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2011.2134450"},{"key":"4","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2008.917522"}],"event":{"name":"2013 International Symposium on VLSI Design, Automation and Test (VLSI-DAT)","start":{"date-parts":[[2013,4,22]]},"location":"Hsinchu","end":{"date-parts":[[2013,4,24]]}},"container-title":["2013 International Symposium onVLSI Design, Automation, and Test (VLSI-DAT)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/6526674\/6533796\/06533835.pdf?arnumber=6533835","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2017,3,22]],"date-time":"2017-03-22T18:50:28Z","timestamp":1490208628000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/6533835\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2013,4]]},"references-count":6,"URL":"https:\/\/doi.org\/10.1109\/vldi-dat.2013.6533835","relation":{},"subject":[],"published":{"date-parts":[[2013,4]]}}}