{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,9,5]],"date-time":"2024-09-05T02:29:45Z","timestamp":1725503385193},"reference-count":10,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2012,4]]},"DOI":"10.1109\/vlsi-dat.2012.6212645","type":"proceedings-article","created":{"date-parts":[[2012,6,19]],"date-time":"2012-06-19T21:01:09Z","timestamp":1340139669000},"page":"1-4","source":"Crossref","is-referenced-by-count":1,"title":["Area and reliability efficient ECC scheme for 3D RAMs"],"prefix":"10.1109","author":[{"family":"Li-Jung Chang","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"family":"Yu-Jen Huang","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"family":"Jin-Fu Li","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"key":"3","doi-asserted-by":"publisher","DOI":"10.1109\/CICC.2010.5617464"},{"key":"2","doi-asserted-by":"publisher","DOI":"10.1145\/2024724.2024774"},{"key":"10","doi-asserted-by":"publisher","DOI":"10.1109\/24.52622"},{"key":"1","doi-asserted-by":"publisher","DOI":"10.1109\/JPROC.2008.2007472"},{"key":"7","first-page":"735","article-title":"An adaptive code rate EDAC scheme for random access memory","author":"chen","year":"2010","journal-title":"Proc Conf Design Automation and Test in Europe (DATE)"},{"key":"6","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2011.2109630"},{"key":"5","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2009.2034408"},{"key":"4","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2009.2034078"},{"key":"9","doi-asserted-by":"publisher","DOI":"10.1016\/j.micpro.2011.01.004"},{"key":"8","doi-asserted-by":"publisher","DOI":"10.1109\/JPROC.2008.2007478"}],"event":{"name":"2012 International Symposium on VLSI Design, Automation and Test (VLSI-DAT)","start":{"date-parts":[[2012,4,23]]},"location":"Hsinchu","end":{"date-parts":[[2012,4,25]]}},"container-title":["Proceedings of Technical Program of 2012 VLSI Design, Automation and Test"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx5\/6204369\/6212573\/06212645.pdf?arnumber=6212645","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2017,3,21]],"date-time":"2017-03-21T16:43:29Z","timestamp":1490114609000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/6212645\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2012,4]]},"references-count":10,"URL":"https:\/\/doi.org\/10.1109\/vlsi-dat.2012.6212645","relation":{},"subject":[],"published":{"date-parts":[[2012,4]]}}}