{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,10,22]],"date-time":"2024-10-22T18:07:21Z","timestamp":1729620441836,"version":"3.28.0"},"reference-count":8,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2014,4]]},"DOI":"10.1109\/vlsi-dat.2014.6834880","type":"proceedings-article","created":{"date-parts":[[2014,6,20]],"date-time":"2014-06-20T21:53:41Z","timestamp":1403301221000},"page":"1-4","source":"Crossref","is-referenced-by-count":1,"title":["A 1.5GHz all-digital frequency-locked loop with 1-bit ΔΣ frequency detection in 0.18μm CMOS"],"prefix":"10.1109","author":[{"given":"Huiying","family":"Zhuo","sequence":"first","affiliation":[]},{"given":"Yu","family":"Li","sequence":"additional","affiliation":[]},{"given":"Woogeun","family":"Rhee","sequence":"additional","affiliation":[]},{"given":"Zhihua","family":"Wang","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"key":"3","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2011.2162917"},{"key":"2","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC.2009.4977324"},{"key":"1","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2005.857417"},{"key":"7","doi-asserted-by":"publisher","DOI":"10.1109\/TCSI.2008.916397"},{"key":"6","doi-asserted-by":"publisher","DOI":"10.1109\/LMWC.2012.2228178"},{"key":"5","doi-asserted-by":"crossref","first-page":"1319","DOI":"10.1109\/TMTT.2011.2114897","article-title":"A 700 A 405 MHz all-digital fractional-N frequency-locked loop for ISM band applications","volume":"59","author":"khalil","year":"2011","journal-title":"IEEE Trans Microw Theory Tech"},{"key":"4","doi-asserted-by":"publisher","DOI":"10.1109\/4.553171"},{"key":"8","doi-asserted-by":"publisher","DOI":"10.1109\/MWSCAS.2010.5548570"}],"event":{"name":"2014 International Symposium on VLSI Design, Automation and Test (VLSI-DAT)","start":{"date-parts":[[2014,4,28]]},"location":"Hsinchu, Taiwan","end":{"date-parts":[[2014,4,30]]}},"container-title":["Technical Papers of 2014 International Symposium on VLSI Design, Automation and Test"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/6823815\/6834858\/06834880.pdf?arnumber=6834880","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2017,6,22]],"date-time":"2017-06-22T11:19:30Z","timestamp":1498130370000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/6834880\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2014,4]]},"references-count":8,"URL":"https:\/\/doi.org\/10.1109\/vlsi-dat.2014.6834880","relation":{},"subject":[],"published":{"date-parts":[[2014,4]]}}}