{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,9,4]],"date-time":"2024-09-04T15:12:46Z","timestamp":1725462766239},"reference-count":10,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2015,4]]},"DOI":"10.1109\/vlsi-dat.2015.7114517","type":"proceedings-article","created":{"date-parts":[[2015,6,3]],"date-time":"2015-06-03T19:28:25Z","timestamp":1433359705000},"page":"1-4","source":"Crossref","is-referenced-by-count":0,"title":["A 127 fJ\/conv. continuous-time delta-sigma modulator with a DWA-embedded two-step time-domain quantizer"],"prefix":"10.1109","author":[{"given":"Chan-Hsiang","family":"Weng","sequence":"first","affiliation":[]},{"given":"Tzu-An","family":"Wei","sequence":"additional","affiliation":[]},{"given":"Tsung-Hsien","family":"Lin","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/TCSII.2013.2291138"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/TCSII.2011.2172709"},{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1109\/VLSIC.2012.6243839"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2012.2217871"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC.2009.4977364"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2012.2221194"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2013.2274852"},{"key":"ref2","first-page":"492","article-title":"A 3 mW 74 dB SNR 2 MHz CT ?? ADC with a tracking-ADC quantizer in 0.13 µm CMOS","author":"dorrer","year":"0","journal-title":"IEEE Int Solid-State Circuits Conf Dig Tech Papers"},{"key":"ref9","first-page":"106","article-title":"An 8.5MHz 67.2dB SNDR CTDSM with ELD compensation embedded twin- T Sab and circular TDC-based quantizer in 90nm CMOS","author":"weng","year":"0","journal-title":"IEEE Symp VLSI Circuits"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2011.2164303"}],"event":{"name":"2015 International Symposium on VLSI Design, Automation and Test (VLSI-DAT)","start":{"date-parts":[[2015,4,27]]},"location":"Hsinchu, Taiwan","end":{"date-parts":[[2015,4,29]]}},"container-title":["VLSI Design, Automation and Test(VLSI-DAT)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/7111694\/7114493\/07114517.pdf?arnumber=7114517","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2017,3,24]],"date-time":"2017-03-24T21:01:21Z","timestamp":1490389281000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/7114517\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2015,4]]},"references-count":10,"URL":"https:\/\/doi.org\/10.1109\/vlsi-dat.2015.7114517","relation":{},"subject":[],"published":{"date-parts":[[2015,4]]}}}