{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,10,30]],"date-time":"2024-10-30T15:50:01Z","timestamp":1730303401501,"version":"3.28.0"},"reference-count":23,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2015,4]]},"DOI":"10.1109\/vlsi-dat.2015.7114576","type":"proceedings-article","created":{"date-parts":[[2015,6,3]],"date-time":"2015-06-03T15:28:25Z","timestamp":1433345305000},"page":"1-4","source":"Crossref","is-referenced-by-count":1,"title":["A latency-elastic and fault-tolerant cache for improving performance and reliability on low voltage operation"],"prefix":"10.1109","author":[{"given":"Yung-Hui","family":"Yu","sequence":"first","affiliation":[]},{"given":"Po-Hao","family":"Wang","sequence":"additional","affiliation":[]},{"given":"Shang-Jen","family":"Tsai","sequence":"additional","affiliation":[]},{"given":"Tien-Fu","family":"Chen","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1147\/rd.144.0390"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1109\/.2005.1469239"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1109\/MDT.2010.115"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2003.817120"},{"key":"ref14","first-page":"234","article-title":"Capacitive-coupling wordline boosting with self-induced VCC collapse for write VMIN reduction in 22-nm 8T SRAM","author":"kulkarni","year":"0","journal-title":"ISSCC 2012"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2009.2032493"},{"key":"ref16","first-page":"846","article-title":"The 65-nm 16-MB shared on-die L3 cache for the dualcore Intel Xeon processor 7100 series","volume":"42","author":"chang","year":"2007","journal-title":"IEEE JSSC"},{"key":"ref17","doi-asserted-by":"publisher","DOI":"10.1109\/ISCA.2008.22"},{"key":"ref18","first-page":"219","article-title":"SRAM word-oriented redundancy methodology using built in self-repair","author":"lee","year":"2004","journal-title":"Proceedings 2004 IEEE International Conference"},{"key":"ref19","doi-asserted-by":"publisher","DOI":"10.1145\/1669112.1669127"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1145\/1816038.1815973"},{"key":"ref3","first-page":"16","volume":"22","author":"bossen","year":"2002","journal-title":"Power4 system design for high reliability Micro IEEE"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2009.2025766"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2005.852295"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1145\/1669112.1669126"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/DATE.2003.1253701"},{"journal-title":"International Technology Roadmap for Semiconductors 2012","year":"0","key":"ref2"},{"journal-title":"Advanced Test Methods for SRAMsEffective Solutions for Dynamic Fault Detection in Nanoscaled Technologies","year":"2010","author":"bosio","key":"ref1"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1109\/MICRO.2007.19"},{"journal-title":"Dinero IV Trace-Driven Uniprocessor Cache Simulator","year":"1998","author":"edler","key":"ref20"},{"journal-title":"CACTI 6 0 A Tool to Model Large Caches","year":"0","key":"ref22"},{"key":"ref21","doi-asserted-by":"publisher","DOI":"10.1145\/2024716.2024718"},{"key":"ref23","first-page":"158","article-title":"A 0.48 V 0.57 nJ\/pixel video-recording SoC in 65nm CMOS","author":"lin","year":"2013","journal-title":"ISSCC 2013 IEEE International 2013"}],"event":{"name":"2015 International Symposium on VLSI Design, Automation and Test (VLSI-DAT)","start":{"date-parts":[[2015,4,27]]},"location":"Hsinchu, Taiwan","end":{"date-parts":[[2015,4,29]]}},"container-title":["VLSI Design, Automation and Test(VLSI-DAT)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/7111694\/7114493\/07114576.pdf?arnumber=7114576","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2017,3,24]],"date-time":"2017-03-24T15:20:58Z","timestamp":1490368858000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/7114576\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2015,4]]},"references-count":23,"URL":"https:\/\/doi.org\/10.1109\/vlsi-dat.2015.7114576","relation":{},"subject":[],"published":{"date-parts":[[2015,4]]}}}