{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,9,7]],"date-time":"2024-09-07T04:28:43Z","timestamp":1725683323067},"reference-count":17,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2018,4]]},"DOI":"10.1109\/vlsi-dat.2018.8373273","type":"proceedings-article","created":{"date-parts":[[2018,6,7]],"date-time":"2018-06-07T23:36:08Z","timestamp":1528414568000},"page":"1-4","source":"Crossref","is-referenced-by-count":1,"title":["Triple patterning lithography-aware detailed routing ensuring via layer decomposability"],"prefix":"10.1109","author":[{"given":"Hua-Yi","family":"Wu","sequence":"first","affiliation":[]},{"given":"Shao-Yun","family":"Fang","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1117\/12.602414"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1145\/2429384.2429396"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1109\/ICCAD.2011.6105297"},{"journal-title":"IBM ILOG CPLEX Optimizer","year":"0","key":"ref13"},{"journal-title":"Cadence SoC Encounter","year":"0","key":"ref14"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1145\/2717764.2723572"},{"journal-title":"International Technology Roadmap for Semiconductors (ITRS)","year":"0","key":"ref16"},{"journal-title":"The Graph Isomorphism Algorithm","year":"0","key":"ref17"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/ASPDAC.2015.7059036"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1117\/12.772780"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1145\/2463209.2488818"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/ICCAD.2015.7372612"},{"key":"ref8","doi-asserted-by":"crossref","first-page":"1641","DOI":"10.7873\/DATE.2015.0413","article-title":"An effective triple patterning aware grid-based detailed routing approach","author":"liu","year":"2015","journal-title":"Automation and Test in Europe Conference and Exhibition"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1145\/2429384.2429408"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1145\/2228360.2228579"},{"key":"ref1","doi-asserted-by":"crossref","first-page":"702839","DOI":"10.1117\/12.793116","article-title":"Comparison of triple-patterning decomposition algorithms using aperiodic tiling patterns","author":"cork","year":"2008","journal-title":"Photomask and NGL Mask Technology XV"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1145\/2228360.2228468"}],"event":{"name":"2018 International Symposium on VLSI Design, Automation and Test (VLSI-DAT)","start":{"date-parts":[[2018,4,16]]},"location":"Hsinchu","end":{"date-parts":[[2018,4,19]]}},"container-title":["2018 International Symposium on VLSI Design, Automation and Test (VLSI-DAT)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/8370612\/8373223\/08373273.pdf?arnumber=8373273","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2022,1,26]],"date-time":"2022-01-26T04:24:29Z","timestamp":1643171069000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/8373273\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2018,4]]},"references-count":17,"URL":"https:\/\/doi.org\/10.1109\/vlsi-dat.2018.8373273","relation":{},"subject":[],"published":{"date-parts":[[2018,4]]}}}