{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,9,5]],"date-time":"2024-09-05T11:13:14Z","timestamp":1725534794697},"reference-count":7,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2018,4]]},"DOI":"10.1109\/vlsi-dat.2018.8373275","type":"proceedings-article","created":{"date-parts":[[2018,6,7]],"date-time":"2018-06-07T19:36:08Z","timestamp":1528400168000},"page":"1-4","source":"Crossref","is-referenced-by-count":1,"title":["MapReduce-based pattern classification for design space analysis"],"prefix":"10.1109","author":[{"given":"Yan-Shiun","family":"Wu","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Hong-Yan","family":"Su","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Yi-Hsiang","family":"Chang","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Rasit Onur","family":"Topaloglu","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Yih-Lang","family":"Li","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"key":"ref4","doi-asserted-by":"crossref","DOI":"10.1145\/2966986.2967032","article-title":"Enabling Online Learning in Lithography Hotspot Detection with Information-theoretic Feature Optimization","author":"zhang","year":"2016","journal-title":"Proc International Conference on Computer Aided Design"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2014.2364973"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1145\/3061639.3062263"},{"key":"ref5","article-title":"CAD Contest in Pattern Classification for Integrated Circuit Design Space Analysis and Benchmark Suite","author":"topaloglu","year":"2016","journal-title":"Proc IEEE\/ACM ICCAD"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1145\/3061639.3062283"},{"key":"ref2","article-title":"A state-of-the-art hotspot recognition system for full chip verification with lithographic simulation","author":"simmons","year":"2011","journal-title":"Proc Int'l Soc for Photonics and Optonics"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1145\/1327452.1327492"}],"event":{"name":"2018 International Symposium on VLSI Design, Automation and Test (VLSI-DAT)","start":{"date-parts":[[2018,4,16]]},"location":"Hsinchu","end":{"date-parts":[[2018,4,19]]}},"container-title":["2018 International Symposium on VLSI Design, Automation and Test (VLSI-DAT)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/8370612\/8373223\/08373275.pdf?arnumber=8373275","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2022,1,26]],"date-time":"2022-01-26T00:44:05Z","timestamp":1643157845000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/8373275\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2018,4]]},"references-count":7,"URL":"https:\/\/doi.org\/10.1109\/vlsi-dat.2018.8373275","relation":{},"subject":[],"published":{"date-parts":[[2018,4]]}}}