{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,1,24]],"date-time":"2026-01-24T19:20:09Z","timestamp":1769282409761,"version":"3.49.0"},"reference-count":9,"publisher":"IEEE","license":[{"start":{"date-parts":[[2019,4,1]],"date-time":"2019-04-01T00:00:00Z","timestamp":1554076800000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"},{"start":{"date-parts":[[2019,4,1]],"date-time":"2019-04-01T00:00:00Z","timestamp":1554076800000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2019,4,1]],"date-time":"2019-04-01T00:00:00Z","timestamp":1554076800000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2019,4]]},"DOI":"10.1109\/vlsi-dat.2019.8741687","type":"proceedings-article","created":{"date-parts":[[2019,6,21]],"date-time":"2019-06-21T02:19:04Z","timestamp":1561083544000},"page":"1-4","source":"Crossref","is-referenced-by-count":6,"title":["High-Throughput 64K-point FFT Processor for THz Imaging Radar System"],"prefix":"10.1109","author":[{"given":"Chia-Kai","family":"Chan","sequence":"first","affiliation":[]},{"given":"Hong-Ke","family":"Lin","sequence":"additional","affiliation":[]},{"given":"Chih-Wei","family":"Liu","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1090\/S0025-5718-1965-0178586-1"},{"key":"ref3","first-page":"357","article-title":"A Pipelined Memory-efficient Architecture for Ultra-long Variable-size FFT processors","author":"chen","year":"2008","journal-title":"Proc of ICCSIT"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1587\/elex.13.20160504"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/4.748190"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1109\/TCSI.2017.2722690"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/ISCAS.2013.6572518"},{"key":"ref2","article-title":"An efficient architecture for ultra long FFTs in FPGAs and ASICs","author":"dillon","year":"2004","journal-title":"High Performance Embedded Computing Conference (HPEC04)"},{"key":"ref9","first-page":"172","article-title":"Challenging the Limits of FFT Performance on FPGAs","author":"garrido","year":"2014","journal-title":"Int Symp Integrated Circuits"},{"key":"ref1","article-title":"Airplane altitude indicating system","author":"bentley","year":"1928","journal-title":"U S Patent No"}],"event":{"name":"2019 International Symposium on VLSI Design, Automation and Test (VLSI-DAT)","location":"Hsinchu, Taiwan","start":{"date-parts":[[2019,4,22]]},"end":{"date-parts":[[2019,4,25]]}},"container-title":["2019 International Symposium on VLSI Design, Automation and Test (VLSI-DAT)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/8734473\/8741402\/08741687.pdf?arnumber=8741687","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2022,7,15]],"date-time":"2022-07-15T03:07:20Z","timestamp":1657854440000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/8741687\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2019,4]]},"references-count":9,"URL":"https:\/\/doi.org\/10.1109\/vlsi-dat.2019.8741687","relation":{},"subject":[],"published":{"date-parts":[[2019,4]]}}}