{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,4,21]],"date-time":"2026-04-21T15:12:05Z","timestamp":1776784325986,"version":"3.51.2"},"reference-count":7,"publisher":"IEEE","license":[{"start":{"date-parts":[[2020,8,1]],"date-time":"2020-08-01T00:00:00Z","timestamp":1596240000000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"},{"start":{"date-parts":[[2020,8,1]],"date-time":"2020-08-01T00:00:00Z","timestamp":1596240000000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2020,8,1]],"date-time":"2020-08-01T00:00:00Z","timestamp":1596240000000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2020,8]]},"DOI":"10.1109\/vlsi-dat49148.2020.9196286","type":"proceedings-article","created":{"date-parts":[[2020,9,15]],"date-time":"2020-09-15T17:36:04Z","timestamp":1600191364000},"page":"1-2","source":"Crossref","is-referenced-by-count":2,"title":["Fault-Aware ECC Techniques for Reliability Enhancement of Flash Memory"],"prefix":"10.1109","author":[{"given":"Shyue-Kung","family":"Lu","sequence":"first","affiliation":[]},{"given":"Zeng-Long","family":"Tsai","sequence":"additional","affiliation":[]},{"given":"Chun-Lung","family":"Hsu","sequence":"additional","affiliation":[]},{"given":"Chi-Tien","family":"Sun","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/VTS.2006.5"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/RELPHY.2008.4558857"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/TIT.2012.2234207"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/MCE.2014.2360965"},{"key":"ref7","first-page":"53","article-title":"An adaptiverate error correction scheme for NAND flash memory","author":"chen","year":"2009","journal-title":"Proc IEEE VLSI Test Symp (VTS)"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/JPROC.2003.811702"},{"key":"ref1","first-page":"3b.2.1","article-title":"Reliability issue of 20 nm MLC NAND flash","author":"youn","year":"2013","journal-title":"IEEE Proc Int Rel Phys Symp (IRPS)"}],"event":{"name":"2020 International Symposium on VLSI Design, Automation and Test (VLSI-DAT)","location":"Hsinchu, Taiwan","start":{"date-parts":[[2020,8,10]]},"end":{"date-parts":[[2020,8,13]]}},"container-title":["2020 International Symposium on VLSI Design, Automation and Test (VLSI-DAT)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/9189776\/9196212\/09196286.pdf?arnumber=9196286","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2022,6,30]],"date-time":"2022-06-30T11:14:14Z","timestamp":1656587654000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/9196286\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2020,8]]},"references-count":7,"URL":"https:\/\/doi.org\/10.1109\/vlsi-dat49148.2020.9196286","relation":{},"subject":[],"published":{"date-parts":[[2020,8]]}}}