{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,10,30]],"date-time":"2024-10-30T15:50:49Z","timestamp":1730303449002,"version":"3.28.0"},"reference-count":16,"publisher":"IEEE","license":[{"start":{"date-parts":[[2021,4,19]],"date-time":"2021-04-19T00:00:00Z","timestamp":1618790400000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2021,4,19]],"date-time":"2021-04-19T00:00:00Z","timestamp":1618790400000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2021,4,19]]},"DOI":"10.1109\/vlsi-dat52063.2021.9427319","type":"proceedings-article","created":{"date-parts":[[2021,5,12]],"date-time":"2021-05-12T16:07:35Z","timestamp":1620835655000},"page":"1-4","source":"Crossref","is-referenced-by-count":3,"title":["An Adaptive Loop Gain Tracking Digital PLL Using Spectrum-Balancing Technique"],"prefix":"10.1109","author":[{"given":"Guan-Yu","family":"Su","sequence":"first","affiliation":[{"name":"National Taiwan University,Graduate Institute of Electronics Engineering,Department of Electrical Engineering,Taipei,Taiwan"}]},{"given":"Zhi-Heng","family":"Kang","sequence":"additional","affiliation":[{"name":"National Taiwan University,Graduate Institute of Electronics Engineering,Department of Electrical Engineering,Taipei,Taiwan"}]},{"given":"Shen-Iuan","family":"Liu","sequence":"additional","affiliation":[{"name":"National Taiwan University,Graduate Institute of Electronics Engineering,Department of Electrical Engineering,Taipei,Taiwan"}]}],"member":"263","reference":[{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1109\/MSSC.2015.2418155"},{"key":"ref11","first-page":"412","article-title":"A 15mW 3.125GHz PLL for serial backplane transceivers in 0.13 mm CMOS","author":"parker","year":"2005","journal-title":"IEEE Int Solid-State Circuits Conf (ISSCC) Dig Tech Papers"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC.2015.7063028"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC.2014.6757430"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2017.2776313"},{"key":"ref15","doi-asserted-by":"crossref","first-page":"117","DOI":"10.1109\/TCSII.2008.2010189","article-title":"Jitter analysis and a benchmarking figure-of-merit for phase-locked loops","volume":"56","author":"gao","year":"2009","journal-title":"IEEE Trans Circuits Syst II Express Briefs"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2016.2598768"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/ASSCC.2015.7387450"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2018.2866454"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2016.2519391"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/TCSI.2017.2679683"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2016.2558664"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/TCSII.2015.2435691"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/TCSII.2009.2032470"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/TCSI.2008.925948"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2006.880629"}],"event":{"name":"2021 International Symposium on VLSI Design, Automation and Test (VLSI-DAT)","start":{"date-parts":[[2021,4,19]]},"location":"Hsinchu, Taiwan","end":{"date-parts":[[2021,4,22]]}},"container-title":["2021 International Symposium on VLSI Design, Automation and Test (VLSI-DAT)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/9427295\/9427308\/09427319.pdf?arnumber=9427319","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2022,8,2]],"date-time":"2022-08-02T19:59:51Z","timestamp":1659470391000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/9427319\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2021,4,19]]},"references-count":16,"URL":"https:\/\/doi.org\/10.1109\/vlsi-dat52063.2021.9427319","relation":{},"subject":[],"published":{"date-parts":[[2021,4,19]]}}}