{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,4,22]],"date-time":"2026-04-22T12:56:17Z","timestamp":1776862577022,"version":"3.51.2"},"reference-count":15,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2012,10]]},"DOI":"10.1109\/vlsi-soc.2012.6379022","type":"proceedings-article","created":{"date-parts":[[2012,12,18]],"date-time":"2012-12-18T16:55:47Z","timestamp":1355849747000},"page":"153-158","source":"Crossref","is-referenced-by-count":3,"title":["A hexagonal shaped processor and interconnect topology for tightly-tiled many-core architecture"],"prefix":"10.1109","author":[{"given":"Zhibin","family":"Xiao","sequence":"first","affiliation":[]},{"given":"Bevan","family":"Baas","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"key":"15","doi-asserted-by":"publisher","DOI":"10.1109\/ACSSC.2008.5074384"},{"key":"13","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2009.2017912"},{"key":"14","doi-asserted-by":"publisher","DOI":"10.1109\/TCSVT.2011.2133290"},{"key":"11","doi-asserted-by":"publisher","DOI":"10.1109\/71.629486"},{"key":"12","doi-asserted-by":"publisher","DOI":"10.1109\/NPC.2009.34"},{"key":"3","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC.2003.1234253"},{"key":"2","doi-asserted-by":"publisher","DOI":"10.1109\/ISCAS.2005.1464952"},{"key":"1","doi-asserted-by":"publisher","DOI":"10.1109\/5.920580"},{"key":"10","doi-asserted-by":"publisher","DOI":"10.1109\/TPDS.2005.100"},{"key":"7","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2010.2079450"},{"key":"6","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2009.2013772"},{"key":"5","first-page":"88","article-title":"TILE64 processor: A 64-core soc with mesh interconnect","author":"bell","year":"0","journal-title":"IEEE International Solid-State Circuits Conference (ISSCC) Feb 2008"},{"key":"4","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2007.916616"},{"key":"9","doi-asserted-by":"publisher","DOI":"10.1109\/12.46277"},{"key":"8","doi-asserted-by":"publisher","DOI":"10.1109\/FMPC.1988.47485"}],"event":{"name":"2012 IEEE\/IFIP 20th International Conference on VLSI and System-on-Chip (VLSI-SoC)","location":"Santa Cruz, CA, USA","start":{"date-parts":[[2012,10,7]]},"end":{"date-parts":[[2012,10,10]]}},"container-title":["2012 IEEE\/IFIP 20th International Conference on VLSI and System-on-Chip (VLSI-SoC)"],"original-title":[],"deposited":{"date-parts":[[2020,10,14]],"date-time":"2020-10-14T11:25:46Z","timestamp":1602674746000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/6379022"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2012,10]]},"references-count":15,"URL":"https:\/\/doi.org\/10.1109\/vlsi-soc.2012.6379022","relation":{},"subject":[],"published":{"date-parts":[[2012,10]]}}}