{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,9,3]],"date-time":"2024-09-03T21:48:15Z","timestamp":1725400095864},"reference-count":26,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2013,10]]},"DOI":"10.1109\/vlsi-soc.2013.6673298","type":"proceedings-article","created":{"date-parts":[[2013,12,4]],"date-time":"2013-12-04T19:45:44Z","timestamp":1386186344000},"page":"308-313","source":"Crossref","is-referenced-by-count":1,"title":["A power-efficient hierarchical network-on-chip topology for stacked 3D ICs"],"prefix":"10.1109","author":[{"given":"Debora","family":"Matos","sequence":"first","affiliation":[]},{"given":"Cezar","family":"Reinbrecht","sequence":"additional","affiliation":[]},{"given":"Tiago","family":"Motta","sequence":"additional","affiliation":[]},{"given":"Altamiro","family":"Susin","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"key":"19","doi-asserted-by":"publisher","DOI":"10.1016\/j.proeng.2012.01.905"},{"key":"17","article-title":"Three-dimensional integrated circuit design","author":"pavlidis","year":"2008","journal-title":"Morgan Kaufmann"},{"key":"18","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2010.2068064"},{"journal-title":"SPEArST","year":"0","key":"15"},{"key":"16","article-title":"A study of through silicon via impact to 3d networkon-chip design","author":"xu","year":"2010","journal-title":"ICEIE"},{"key":"13","doi-asserted-by":"crossref","first-page":"581","DOI":"10.1145\/1629911.1630061","article-title":"exploring serial vertical interconnects for 3d ics","author":"pasricha","year":"2009","journal-title":"2009 46th ACM\/IEEE Design Automation Conference dac"},{"journal-title":"OMAP of Texas Instruments","year":"0","key":"14"},{"key":"11","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2009.2021734"},{"key":"12","first-page":"32","author":"feero","year":"2009","journal-title":"Networks-on-chip in A Three-dimensional Environment A Performance Evaluation TC"},{"key":"21","doi-asserted-by":"publisher","DOI":"10.1109\/VLSID.2012.82"},{"key":"20","doi-asserted-by":"publisher","DOI":"10.1007\/s10836-012-5322-3"},{"key":"22","doi-asserted-by":"publisher","DOI":"10.1109\/DATE.2012.6176490"},{"key":"23","doi-asserted-by":"publisher","DOI":"10.1007\/0-387-33403-3_3"},{"key":"24","doi-asserted-by":"publisher","DOI":"10.1109\/NOCS.2010.28"},{"key":"25","doi-asserted-by":"publisher","DOI":"10.1109\/DSD.2007.4341514"},{"key":"26","doi-asserted-by":"publisher","DOI":"10.1109\/HPCA.2009.4798252"},{"key":"3","first-page":"9","author":"seiculescu","year":"2009","journal-title":"Sunfloor 3D A Tool for Networks on Chip Topology Synthesis for 3-D Systems on Chips"},{"key":"2","first-page":"223","author":"chao","year":"2010","journal-title":"Traffic and Thermal Aware Run Time Thermal Management Scheme for 3D NoC Systems"},{"key":"10","doi-asserted-by":"publisher","DOI":"10.1145\/2076501.2076508"},{"key":"1","first-page":"496","author":"davis","year":"2009","journal-title":"Application Exploration for 3D Integrated Circuits TCAM FIFO and FFT Case Studies"},{"key":"7","doi-asserted-by":"publisher","DOI":"10.1109\/DDECS.2011.5783057"},{"key":"6","doi-asserted-by":"publisher","DOI":"10.1109\/3DIC.2009.5306575"},{"key":"5","first-page":"517","article-title":"Application-specific 3D network-on-chip design using simulated allocation","author":"zhou","year":"2010","journal-title":"ASP-DAC"},{"key":"4","doi-asserted-by":"publisher","DOI":"10.1155\/2010\/603059"},{"key":"9","doi-asserted-by":"publisher","DOI":"10.1109\/RSP.2010.5656418"},{"key":"8","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2011.2176730"}],"event":{"name":"2013 IFIP\/IEEE 21st International Conference on Very Large Scale Integration (VLSI-SoC)","start":{"date-parts":[[2013,10,7]]},"location":"Istanbul, Turkey","end":{"date-parts":[[2013,10,9]]}},"container-title":["2013 IFIP\/IEEE 21st International Conference on Very Large Scale Integration (VLSI-SoC)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/6662534\/6673221\/06673298.pdf?arnumber=6673298","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2017,6,22]],"date-time":"2017-06-22T03:38:48Z","timestamp":1498102728000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/6673298\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2013,10]]},"references-count":26,"URL":"https:\/\/doi.org\/10.1109\/vlsi-soc.2013.6673298","relation":{},"subject":[],"published":{"date-parts":[[2013,10]]}}}