{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,9,5]],"date-time":"2024-09-05T23:52:28Z","timestamp":1725580348841},"reference-count":12,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2015,10]]},"DOI":"10.1109\/vlsi-soc.2015.7314395","type":"proceedings-article","created":{"date-parts":[[2015,11,2]],"date-time":"2015-11-02T18:01:11Z","timestamp":1446487271000},"page":"74-79","source":"Crossref","is-referenced-by-count":0,"title":["Dynamic error tracking and supply voltage adjustment for low power"],"prefix":"10.1109","author":[{"given":"Pierre","family":"Nicolas-Nicolaz","sequence":"first","affiliation":[]},{"given":"Kiyoung","family":"Choi","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2005.852162"},{"journal-title":"Proceedings of the 40th Annual Design Automation Conference","article-title":"Parameter variations and impact on circuits and microarchitecture","year":"2003","key":"ref3"},{"key":"ref10","first-page":"1013","article-title":"Temperature-adaptive voltage scaling for enhanced energy efficiency in subthreshold memory arrays","author":"ranjith","year":"2009","journal-title":"Microelectronics Journal 40"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/MICRO.2003.1253179"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1109\/ASPDAC.2010.5419690"},{"key":"ref5","doi-asserted-by":"crossref","DOI":"10.1109\/ISSCC.2007.373462","article-title":"A distributed critical-path timing monitor for a 65nm high-performance microprocessor","author":"drake","year":"2007","journal-title":"IEEE International Solid-State Circuits Conference 2007 ISSCC 2007 Digest of Technical Papers"},{"key":"ref12","article-title":"Critical Path Monitor Enabled Dynamic Voltage Scaling for Graceful Degradation in Sub-Threshold Designs","author":"yu-guang","year":"2014","journal-title":"Proceedings of the the 51st Annual Design Automation Conference on Design Automation Conference"},{"key":"ref8","doi-asserted-by":"crossref","DOI":"10.1145\/344166.344181","article-title":"Design issues for dynamic voltage scaling","author":"burd","year":"2000","journal-title":"Proceedings of the 2000 international symposium on Low power electronics and design"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1145\/2228360.2228535"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC.1972.1155118"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2002.803957"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/JPROC.2009.2034764"}],"event":{"name":"2015 IFIP\/IEEE International Conference on Very Large Scale Integration (VLSI-SoC)","start":{"date-parts":[[2015,10,5]]},"location":"Daejeon, South Korea","end":{"date-parts":[[2015,10,7]]}},"container-title":["2015 IFIP\/IEEE International Conference on Very Large Scale Integration (VLSI-SoC)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/7304349\/7314373\/07314395.pdf?arnumber=7314395","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2022,5,24]],"date-time":"2022-05-24T21:13:15Z","timestamp":1653426795000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/7314395\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2015,10]]},"references-count":12,"URL":"https:\/\/doi.org\/10.1109\/vlsi-soc.2015.7314395","relation":{},"subject":[],"published":{"date-parts":[[2015,10]]}}}