{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,9,6]],"date-time":"2024-09-06T20:25:46Z","timestamp":1725654346878},"reference-count":7,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2015,10]]},"DOI":"10.1109\/vlsi-soc.2015.7314420","type":"proceedings-article","created":{"date-parts":[[2015,11,2]],"date-time":"2015-11-02T23:01:11Z","timestamp":1446505271000},"page":"225-230","source":"Crossref","is-referenced-by-count":9,"title":["Timing and robustness analysis of Pulsed-Index protocols for single-channel IoT communications"],"prefix":"10.1109","author":[{"given":"Shahzad","family":"Muzaffar","sequence":"first","affiliation":[]},{"given":"Ibrahim M.","family":"Elfadel","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"key":"ref4","first-page":"1485","article-title":"A pulsed-index technique for single-channel, lowpower, dynamic signaling","author":"shahzad","year":"2015","journal-title":"Design Automation and Test in Europe (DATE)"},{"journal-title":"OneWireViewer User's Guide Version 1 4 AN3358","year":"2009","key":"ref3"},{"key":"ref6","first-page":"162","article-title":"Verilog synthesis of usb 2.0 full-speed device phy ip","author":"kee-bum","year":"2013","journal-title":"International SoC Design Conference(ISOCC)"},{"journal-title":"Principles Of Digital Communication System and Computer Network","year":"2003","author":"prasad","key":"ref5"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2007.903080"},{"journal-title":"Technical Specification Version 7 3 0 2008-09","article-title":"UICC – Contactless Front-end (CLF) Interface","year":"0","key":"ref2"},{"key":"ref1","first-page":"228","article-title":"Monolithic data circuit-terminating unit (dcu) for a one-wire vehicle network","author":"dos reis filho","year":"1998","journal-title":"Solid-State Circuits Conference"}],"event":{"name":"2015 IFIP\/IEEE International Conference on Very Large Scale Integration (VLSI-SoC)","start":{"date-parts":[[2015,10,5]]},"location":"Daejeon, South Korea","end":{"date-parts":[[2015,10,7]]}},"container-title":["2015 IFIP\/IEEE International Conference on Very Large Scale Integration (VLSI-SoC)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/7304349\/7314373\/07314420.pdf?arnumber=7314420","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2017,3,24]],"date-time":"2017-03-24T21:08:32Z","timestamp":1490389712000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/7314420\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2015,10]]},"references-count":7,"URL":"https:\/\/doi.org\/10.1109\/vlsi-soc.2015.7314420","relation":{},"subject":[],"published":{"date-parts":[[2015,10]]}}}