{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,10,30]],"date-time":"2024-10-30T15:42:39Z","timestamp":1730302959282,"version":"3.28.0"},"reference-count":10,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2016,9]]},"DOI":"10.1109\/vlsi-soc.2016.7753559","type":"proceedings-article","created":{"date-parts":[[2016,11,24]],"date-time":"2016-11-24T21:38:54Z","timestamp":1480023534000},"page":"1-6","source":"Crossref","is-referenced-by-count":0,"title":["WCET overapproximation for software in the context of a Cyber-Physical System"],"prefix":"10.1109","author":[{"given":"Niklas","family":"Krafczyk","sequence":"first","affiliation":[]},{"given":"Heinz","family":"Riener","sequence":"additional","affiliation":[]},{"given":"Goerschwin","family":"Fey","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"doi-asserted-by":"publisher","key":"ref4","DOI":"10.1145\/2666357.2597817"},{"doi-asserted-by":"publisher","key":"ref3","DOI":"10.1007\/978-1-4020-8157-6_29"},{"key":"ref10","article-title":"The worst-case execution-time problem - Overview of methods and survey of tools","volume":"7","author":"reinhard","year":"2008","journal-title":"ACM Transactions on Embedded Computing Systems (TECS)"},{"doi-asserted-by":"publisher","key":"ref6","DOI":"10.1109\/INDIN.2010.5549585"},{"year":"2009","author":"sungjun","journal-title":"Using a Model Checker to Determine Worst-case Execution Time","key":"ref5"},{"doi-asserted-by":"publisher","key":"ref8","DOI":"10.1109\/IDT.2013.6727080"},{"doi-asserted-by":"publisher","key":"ref7","DOI":"10.1007\/978-3-540-27813-9_26"},{"doi-asserted-by":"publisher","key":"ref2","DOI":"10.1007\/978-3-540-24730-2_15"},{"doi-asserted-by":"publisher","key":"ref9","DOI":"10.1145\/2331147.2331165"},{"doi-asserted-by":"publisher","key":"ref1","DOI":"10.1109\/RTAS.2013.6531082"}],"event":{"name":"2016 IFIP\/IEEE International Conference on Very Large Scale Integration (VLSI-SoC)","start":{"date-parts":[[2016,9,26]]},"location":"Tallinn, Estonia","end":{"date-parts":[[2016,9,28]]}},"container-title":["2016 IFIP\/IEEE International Conference on Very Large Scale Integration (VLSI-SoC)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/7744451\/7753408\/07753559.pdf?arnumber=7753559","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2016,12,20]],"date-time":"2016-12-20T03:35:59Z","timestamp":1482204959000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/7753559\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2016,9]]},"references-count":10,"URL":"https:\/\/doi.org\/10.1109\/vlsi-soc.2016.7753559","relation":{},"subject":[],"published":{"date-parts":[[2016,9]]}}}