{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,3,13]],"date-time":"2026-03-13T15:20:51Z","timestamp":1773415251521,"version":"3.50.1"},"reference-count":21,"publisher":"IEEE","license":[{"start":{"date-parts":[[2020,10,5]],"date-time":"2020-10-05T00:00:00Z","timestamp":1601856000000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2020,10,5]],"date-time":"2020-10-05T00:00:00Z","timestamp":1601856000000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2020,10,5]]},"DOI":"10.1109\/vlsi-soc46417.2020.9344080","type":"proceedings-article","created":{"date-parts":[[2022,7,1]],"date-time":"2022-07-01T15:36:43Z","timestamp":1656689803000},"page":"165-170","source":"Crossref","is-referenced-by-count":9,"title":["RAT: A Lightweight System-level Soft Error Mitigation Technique"],"prefix":"10.1109","author":[{"given":"Jonas","family":"Gava","sequence":"first","affiliation":[{"name":"PPGC\/PGMicro - Federal University of Rio Grande do Sul,Porto Alegre,Brazil"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Ricardo","family":"Reis","sequence":"additional","affiliation":[{"name":"PPGC\/PGMicro - Federal University of Rio Grande do Sul,Porto Alegre,Brazil"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Luciano","family":"Ost","sequence":"additional","affiliation":[{"name":"Loughborough University,Loughborough,United Kingdom"}],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1109\/MM.2007.4"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1109\/LATW.2012.6261259"},{"key":"ref12","year":"2020","journal-title":"OVPsim Simulator"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1145\/2024716.2024718"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1109\/VLSI-SoC.2019.8920378"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1109\/IISWC.2009.5306797"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.1109\/DATE.2009.5090716"},{"key":"ref17","doi-asserted-by":"publisher","DOI":"10.1145\/2463209.2488859"},{"key":"ref18","doi-asserted-by":"publisher","DOI":"10.1109\/LATW.2011.5985914"},{"key":"ref19","doi-asserted-by":"publisher","DOI":"10.1109\/TNS.2018.2886094"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1007\/978-1-4020-8157-6_13"},{"key":"ref3","doi-asserted-by":"crossref","first-page":"279","DOI":"10.1007\/978-3-319-14352-1_18","article-title":"Overhead reduction in data-flow software-based fault tolerance techniques","author":"chielle","year":"2016","journal-title":"FPGAs and Parallel Architectures for Aerospace Applications"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/ICDSN.2000.857517"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/HPCA.2005.37"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1109\/TNS.2019.2912323"},{"key":"ref7","first-page":"39","article-title":"Detecting soft errors by a purely software approach: Method, tools and experimental results","author":"nicolescu","year":"2003","journal-title":"Embedded Software for SoC"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/24.914544"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1177\/1094342014522573"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1109\/RADECS.2016.8093180"},{"key":"ref20","doi-asserted-by":"publisher","DOI":"10.1145\/1113841.1113843"},{"key":"ref21","year":"2020","journal-title":"ARMv8-A parameters in general-purpose registers"}],"event":{"name":"2020 IFIP\/IEEE 28th International Conference on Very Large Scale Integration (VLSI-SOC)","location":"Salt Lake City, UT, USA","start":{"date-parts":[[2020,10,5]]},"end":{"date-parts":[[2020,10,7]]}},"container-title":["2020 IFIP\/IEEE 28th International Conference on Very Large Scale Integration (VLSI-SOC)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/9344049\/9344068\/09344080.pdf?arnumber=9344080","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2022,12,6]],"date-time":"2022-12-06T18:03:01Z","timestamp":1670349781000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/9344080\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2020,10,5]]},"references-count":21,"URL":"https:\/\/doi.org\/10.1109\/vlsi-soc46417.2020.9344080","relation":{},"subject":[],"published":{"date-parts":[[2020,10,5]]}}}